UPD161831 Datasheet, PDF (12/67 Pages) NEC – 240/244-OUTPUT TFT-LCD SOURCE DRIVER WITH TIMING GENERATOR

µPD161831
3.7 Other Control Pins
Pin Symbol
Pin Name
Pin Name
TESTIN1 to TEST input
515 to 512
TESTIN4
TESTOUT
TEST output
511
TEST_COM2 TEST output
414, 415
TEST_VCLAMP TEST output
412, 413
5 _{BGR_O}
Hand cap regulator 416
5
PVCC
output
Power supply for
445
5
PVSS
pull-up
Power supply for
456
pull-down
VCC
Logic supply voltage 427 to 430
VSS
Driver ground
327 to 331.
431 to 435
Dummy
Dummy
1 to 4,
249 to 282,
319 to 326,
419 to 426,
462 to 466,
486 to 490,
526 to 532
I/O
Input
Description
Keep this pin low-level or leave it open.
Output
Output
Output
Output
Leave this pin open.
Leave this pin open.
Leave this pin open.
Leave this pin open.
−
This is pull-up power supply for mode setting pin.
−
This is pull-down power supply for mode setting pin.
−
2.2 to 3.6 V
−
Grounding
−
Dummy pin
Caution To avoid latch-up failure, the sequence when turning on the power must be VCC → logic input →
booster voltage for rising → gray-scale power supply (V0-V4), and the reverse sequence when
turning off the power. Follow this sequence during shift periods as well.
12
Preliminary Product Information S16269EJ2V0PM