UPD780957 Datasheet, PDF (114/326 Pages) NEC – 8-Bit Single-Chip Microcontrollers

CHAPTER 5 CLOCK GENERATOR
5.5 Clock Generator Operations
The clock generator generates the following clocks and controls the operation modes of the CPU, such as the
standby mode.
• Main system clock fCC
• Subsystem clock 1 fXT1
• Subsystem clock 2 fXT2
• CPU clock fCPU
• Clock to peripheral hardware
The following clock generator functions and operations are determined with the processor clock control register
(PCC).
(a) The RESET signal sets the processor clock control register (PCC) to 04H^Note. Note that while a low-level
signal is being input to the RESET pin, oscillation of the main system clock is stopped.
Note Be sure to set PCC to either 00H, 01H, or 02H before subsystem clock 1 operation begins
(otherwise correct clock switching will not be possible).
(b) While the main system clock is selected, three types of minimum instruction execution time (1.7 µs, 3.4
µs, and 6.7 µs: @ 1.2 MHz operation) can be selected by setting PCC.
(c) HALT mode is available while the main system clock is selected.
(d) Low-current consumption operation (61 µs: @ 32.768 kHz operation) is available with subsystem clock 1,
which is selected by setting PCC.
(e) While subsystem clock 1 is selected, the main system clock oscillation can be stopped by setting PCC.
At this time the HALT mode can be used.
(f) The peripheral functions that are connected to subsystem clocks 1 and 2 can be used even if HALT
mode is entered.
(g) The SUB2 clock control register (CKC) is used to control subsystem clock 2. Subsystem clock 2 can be
used as the clock for TM0, MRTD0, SIO3, and UART2.
Caution Subsystem clock 2 cannot be used as the CPU clock.
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User’s Manual U13655EJ2V1UD