UPD75336 Datasheet, PDF (10/68 Pages) NEC – 4-BIT SINGLE-CHIP MICROCOMPUTER

µPD75336
3.2 NON-PORT PINS (1/2)
Pin Name
TI0
TI1
PTO0
PTO1
PCL
BUZ
SCK
SO/SB0
SI/SB1
INT4
Input/Output
Input
Output
Output
Output
Input/output
Input/output
Input/output
Input
Dual-
Function Pin
Function
P13
External event pulse input to timer/event counter
P80
P20
Timer/event counter output
P21
P22
Clock output
P23
Fixed frequency output (for buzzer or system clock trim-
ming)
P01
Serial clock input/output
P02
Serial data output
Serial bus input/output
P03
Serial data input
Serial bus input/output
P00
Edge detection vectored interrupt input (both rising edge
and falling edge detection effective)
INT0
INT1
INT2
KR0 to KR3
KR4 to KR7
X1
X2
XT1
XT2
RESET
IC
VDD
VSS
Input
Input
Input
Input
Input
Input
––
Input
—
—
—
P10
Edge detection vectored interrupt ^Clocked
input (detection edge selectable)
P11
Asynchronous
P12
Edge detection testable input (ris-
ing edge detection)
Asynchronous
P60 to P63 ^{Parallel falling edge detection testable input}
P70 to P73 ^{Parallel falling edge detection testable input}
Main system clock oscillation crystal/ceramic connection
—
pin. For external clock, the external clock signal is input to
X1 and its opposite phase is input to X2.
Subsystem clock oscillation crystal connection pin. For
—
external clock, the external clock signal is input to XT1 and
XT2 is opened. XT1 can be used as a 1-bit input (test).
—
System reset input
—
Internally Connected. Connect the IC pin to VDD directly.
—
Positive power supply
—
GND potential
* : Schmitt triggered input
Reset
Input
Input
Input
Input
Input
Input
Input
Input
Input
Input
Input
Input
––
—
—
—
—
—
I/O Circuit
Type *
B -C
E -E
E-B
E-B
E-B
F -A
F -B
M -C
B
B -C
B -C
F -A
F -A
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––
B
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