UPD72042A Datasheet, PDF (1/92 Pages) NEC – LSI DEVICES FOR Inter Equipment BusTM (IEBusTM) PROTOCOL CONTROL

DATA SHEET
MOS INTEGRATED CIRCUIT
µPD72042A, 72042B
LSI DEVICES FOR Inter Equipment Bus^TM (IEBus^TM)
PROTOCOL CONTROL
The µPD72042A and µPD72042B are microcomputer peripheral LSI devices for IEBus protocol control.
The µPD72042A and µPD72042B perform all the processing required for layers 1 and 2 of the IEBus. The devices
incorporate large transmission and reception buffers, allowing the microcomputer to perform IEBus operations without
interruption. They also contain an IEBus driver and receiver, allowing them to directly connected to the bus directly.
FEATURES
• ^{Control of layers 1 and 2 of the IEBus protocol}
• Support of a multi-master scheme
• Broadcast function
• Two communication modes having different
transmission speeds can be selected.
Mode 0
Mode 1
When operating
at 6 MHz
Approx. 3.9 Kbps
Approx. 17 Kbps
When operating
at 6.29 MHz
Approx. 4.1 Kbps
Approx. 18 Kbps
q Built-in IEBus driver and receiver
q Transmission and reception buffers
Transmission buffer : 33 bytes, FIFO
Reception buffer
: 40 bytes, FIFO (capable of
holding more than one frame
of reception data.)
ORDERING INFORMATION
• ^{Microcomputer interface}
Three-/two-wire serial I/O
• Transfer starting with MSB : µPD72042A
• Transfer starting with LSB : µPD72042B
• ^{Program crashes can be detected by means of a}
watchdog timer.
• ^{Low power consumption (standby mode):}
50 µA (max)
• ^{Oscillator frequency (fX): 6 MHz, 6.29 MHz}
• frequency accuracy: ±1.5%
• ^{Operating voltage: 5 V ±10%}
Part number
µPD72042AGT
µPD72042BGT
Package
16-pin plastic SOP (375 mil)
16-pin plastic SOP (375 mil)
Starting with MSB/LSB
MSB
LSB
The information in this document is subject to change without notice.
Document No. S13990EJ2V0DS00 (2nd edition)
The mark shows major revised points.
(Previous No. ID-3649)
Date Published January 1999 N CP(N)
Printed in Japan
©
1995