UPA1500B Datasheet, PDF (1/8 Pages) NEC – N-CHANNEL POWER MOS FET ARRAY SWITCHING USE

DATA SHEET
COMPOUND FIELD EFFECT POWER TRANSISTOR
µPA1500B
N-CHANNEL POWER MOS FET ARRAY
SWITCHING USE
DESCRIPTION
The µPA1500B is N-channel Power MOS FET Array
that built in 4 circuits and surge absorber designed for
solenoid, motor and lamp driver.
FEATURES
• 4 V driving is possible
• Large Current and Low On-state Resistance
ID(DC) = ±3 A
RDS(on)1 ≤ 0.18 Ω MAX. (VGS = 10 V, ID = 2 A)
RDS(on)2 ≤ 0.24 Ω MAX. (VGS = 4 V, ID = 2 A)
• Low Input Capacitance Ciss = 200 pF TYP.
• Surge Absorber, built in
PACKAGE DIMENSIONS
(in millimeters)
31.5 MAX.
4.2 MAX.
1 2 3 4 5 6 7 8 9 10 11 12
2.54 TYP.
0.7±0.1
1.4±0.1 0.5±0.1 1.4 TYP.
ORDERING INFORMATION
Type Number
µPA1500BH
Package
12 Pin SIP
ABSOLUTE MAXIMUM RATINGS (TA = 25 ˚C)
Drain to Source Voltage
VDSS ^{Note 1}
60
V
Gate to Source Voltage
VGSS ^{Note 2}
±20
V
Drain Current (DC)
ID(DC)
Drain Current (pulse)
ID(pulse) ^{Note 3}
Repetitive peak Reverse Voltage VRRM ^{Note 4}
Diode Forward Current
IF(av) ^{Note 4}
Total Power Dissipation
PT1 ^{Note 5}
Total Power Dissipation
PT2 ^{Note 6}
±3.0
±12
65
3.0
28
4.0
A/unit
A/unit
V
A/unit
W
W
Channel Temperature
TCH
150
˚C
Storage Temperature
Single Avalanche Current
Single Avalanche Energy
Tstg
IAS ^{Note 7}
EAS ^{Note 7}
–55 to 150 ˚C
3.0
A
0.9
mJ
Notes 1. VGS = 0
2. VDS = 0
3. PW ≤ 10 µs, Duty Cycle ≤ 1 %
4. Rating of Surge Absorber
5. 4 Circuits, TC = 25 ˚C
6. 4 Circuits, TA = 25 ˚C
7. Starting TCH = 25 ˚C, V DD = 30 V, VGS = 20 V → 0,
RG = 25 Ω, L = 100 µH
ELECTRODE CONNECTION
1, 5, 8, 12 GATE
2, 4, 9, 11 DRAIN, ANODE
6, 7
SOURCE
3, 10
CATHODE
CONNECTION DIAGRAM
2
3
4
D5
D6
RG
D1
RG
D2
1
5
ZD
ZD
6
9
10
11
D7
D8
RG
D3
RG
D4
8
12
ZD
ZD
7
D1 to D4 : Body Diode
D5 to D8 : Surge Absorber
ZD
: Gate to Source Protection Diode
RG
: Gate Input Resistance 330 Ω TYP.
The diode connected between the gate and source of the transistor serves as a protector against ESD. When this
device is actually used, an additional protection circuit is externally required if a voltage exceeding the rated voltage
may be applied to this device.
Document No. G10597EJ2V0DS00 (2nd edition)
Date Published December 1995 P
Printed in Japan
©
1995