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NE678M04 Datasheet, PDF (1/7 Pages) NEC – MEDIUM POWER NPN SILICON HIGH FREQUENCY TRANSISTOR
MEDIUM POWER NPN SILICON
HIGH FREQUENCY TRANSISTOR
NE678M04
FEATURES
• HIGH GAIN BANDWIDTH:
fT = 12 GHz
• HIGH OUTPUT POWER:
P-1dB = 18 dBm at 1.8 GHz
• HIGH LINEAR GAIN:
GL = 13 dB at 1.8 GHz
• NEW LOW PROFILE M04 PACKAGE:
SOT-343 footprint, with a height of only 0.59 mm
Flat lead style for better RF performance
DESCRIPTION
The NE678M04 is fabricated using NEC's HFT3 wafer pro-
cess. With a transition frequency of 12 GHz, the NE678M04 is
usable in applications from 100 MHz to 3 GHz. The NE678M04
provides P1dB of 18 dBm, even with low voltage and low
current, making this device an excellent choice for the driver
stage for mobile or fixed wireless applications.
2.05±0.1
1.25±0.1
+0.30+-00..0051(leads 1, 3 and ,4)
The NE678M04 is housed in NEC's new low profile/flat lead
style "M04" package
ELECTRICAL CHARACTERISTICS (TA = 25°C)
PART NUMBER
PACKAGE OUTLINE
EIAJ3 REGISTRATION NUMBER
PIN CONNECTIONS
1. Emitter
2. Collector
3. Emitter
4. Base
NE678M04
M04
2SC5753
SYMBOLS
PARAMETERS AND CONDITIONS
UNITS
MIN
TYP
MAX
ICBO
Collector Cutoff Current at VCB = 5V, IE = 0
nA
100
IEBO
Emitter Cutoff Current at VEB = 1 V, IC = 0
hFE
DC Current1 Gain at VCE = 3 V, IC = 30 mA
nA
100
75
120
150
P1dB
Output Power at 1 dB compression point at VCE = 2.8 V, ICQ = 10 mA, dBm
f = 1.8 GHz, Pin = 7 dBm
18.0
GL
Linear Gain at VCE = 2.8 V, IC = 10 mA, f = 1.8 GHz, Pin = -5 dBm
dB
13.0
MAG
Maximum Available Gain4 at VCE = 3 V, IC = 30 mA, f = 2 GHz
dBm
13.5
|S21E|2
Insertion Power Gain at VCE = 3 V, IC = 30 mA, f = 2 GHz
dB
8.0
10.5
ηc
Collector Efficiency at VCE = 2.8 V, ICQ = 10 mA, f = 1.8 GHz,
%
55
Pin = 7 dBm
NF
fT
Cre
Notes:
Noise Figure at VCE = 3 V, IC = 7 mA, f = 2 GHz, ZS = Zopt
Gain Bandwidth at VCE = 3 V, IC = 30 mA, f = 2 GHz
Reverse Transfer Capacitance2 at VCB = 3 V, IC = 0, f = 1 MHz
dB
GHz
pF
1.7
2.5
12.0
0.42
0.7
1. Pulsed measurement, pulse width ≤ 350 µs, duty cycle ≤ 2 %.
2. Collector to Base capacitance measured by capacitance meter(automatic balance bridge method) when emitter pin is connected to the
guard pin of capacitance meter.
3. Electronic Industrail Association of Japan.
4. MAG = |S21| (K ± K 2 - 1 ).
|S12|
California Eastern Laboratories