D1U86 Datasheet, PDF (5/7 Pages) Murata Power Solutions Inc. – 86mm 1U Front End DC-DC Power Supply Converter

TIMING DIAGRAM
*NOTE: The PSOK levels after the loss of the incoming DC source may be either 1.1V or 2.2V depending on the relative timing of the TDCPOK_OFF and TPWRP_GOOD_HOLD-Up
TIMING SPECIFICATIONS
Parameter
Tsb_On
Tsb_Vout
TPWR_GOOD_On
TVout_Hold-up
Tsb_Hold-up
TPWR_GOOD_OFF
TPSON_On_Delay
Description
Min
Delay from DC being applied to standby output being within regulation
0
Delay from standby output to main output voltage being within regulation
50
Delay from output voltages within regulation limits to PWR_GOOD assertion
20
Delay from loss of AC to main output being out of regulation
1
Delay from loss of AC to standby output being out of regulation
20
Delay from de-assertion of PWR_GOOD to output falling out of regulation
1
Delay from PSON assertion to output being within regulation
300
OUTPUT AND SIGNAL SPECIFICATION
Pin#
Function
Pin Type Description
14-26, 39-51 RTN
Power Ground Power and Standby Return
1-13, 52-64 12V
Power
12V Output
37
12VSB
Power
12V Standby Output
38
PSINTERRUPT Output
Active low; interrupt line for power
supply fault & warning detection as per
36
PRESENT# Input
Power Supply Present Signal (shortest
Combination of their power supply
output indicator signals:
35
PSOK*
Analog output 1. DC input OK
2. Power Good
3. Power Supply Fault
Analog representation of main output
34
ISHARE
Analog I/O current. Typical analog voltage shall be
60.15mV/Amp of main output current.
33
PSON#
Input
Power Supply on/off control signal
32
SCL
Input
SMBus/PMBus Clock
31
SDA
I/O
SMBus/PMBus Data
30
GND
Analog I/O Power Supply Signal Ground
29
N/A
N/A
Reserved; no User connection
28
N/A
N/A
Reserved; no User connection
27
ADDR
Analog input PMBus Address
Max Unit
3000 ms
500 ms
500 ms
ms
2000 ms
ms
500 ms