ADCDS-1403 Datasheet, PDF (1/9 Pages) C&D Technologies – 14-Bit, 3 Megapixels/Second Imaging Signal Processor

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ADCDS-1403
14-Bit, 3 Megapixels/Second Imaging Signal Processor
FEATURES
„ 14-bit resolution
„ 3MPPS throughput rate (14-bits)
„ Functionally complete
„ Very low noise
„ Excellent Signal-to-Noise ratio
„ Edge triggered
„ Small, 40-pin, TDIP package
„ Low power, 500mW typical
„ Low cost
„ Programmable Analog Bandwidth
PRODUCT OVERVIEW
The ADCDS-1403 is an application-specific
video signal processor designed for electronic-
imaging applications that employ CCD's (charge
coupled devices) as their photodetector. The
ADCDS-1403 incorporates a "user configurable"
input amplifier, a CDS (correlated double sampler)
and a sampling A/D converter in a single package,
providing the user with a complete, high perfor-
mance, low-cost, low-power, integrated solution.
The key to the ADCDS-1403's performance is
a unique, high-speed, high-accuracy CDS circuit,
which eliminates the effects of residual charge,
charge injection and "kT/C" noise on the CCD's
output floating capacitor, producing a "valid video"
output signal. The ADCDS-1403 digitizes this
resultant "valid video" signal using a high-speed,
low-noise sampling A/D converter.
The ADCDS-1403 requires only the rising edge
of start convert pulse to initiate its conversion
process. Additional features of the ADCDS-1403
include gain adjust, offset adjust, precision +2.4V
reference, and a programmable analog bandwidth
function.
INPUT/OUTPUT CONNECTIONS
Pin
Function
Pin
Function
1 FINE GAIN ADJUST
40 NO CONNECT
2 OFFSET ADJUST
39 +12V
3 DIRECT INPUT
38 –5VA
4 INVERTING INPUT
37 ANALOG GROUND
5 NON-INVERTING INPUT
36 +5VA
6 +2.4V REF. OUTPUT
35 ANALOG GROUND
7 ANALOG GROUND
34 +5VD
8 NO CONNECT
33 DIGITAL GROUND
9 NO CONNECT
32 DIGITAL GROUND
10 BIT 14 (LSB)
31 A1
11 BIT 13
30 AØ
12 BIT 12
29 NO CONNECT
13 BIT 11
28 NO CONNECT
14 BIT 10
27 DATA VALID
15 BIT 9
26 REFERENCE HOLD
16 BIT 8
25 START CONVERT
17 BIT 7
24 OUT-OF-RANGE
18 BIT 6
23 BIT 1 (MSB)
19 BIT 5
22 BIT 2
20 BIT 4
21 BIT 3
759
INVERTING INPUT 4
0.01μF
DIRECT INPUT 3
NON-INVERTING INPUT 5
+12VA
39
5239
–5VA
38
+5VA
36
+5VD
34
INPUT AMPLIFIER
CORRELATED
5K 9
DOUBLE
SAMPLER
SAMPLING
A/D
OFFSET ADJUST 2
25 START CONVERT
1 FINE GAIN ADJUST
23 BIT 1 (MSB)
10 BIT 14 (LSB)
Ḥ
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REFERENCE HOLD 26
TIMING
AND
CONTROL
24 OUT-OF-RANGE
6 +2.4V REFERENCE OUTPUT
32, 33
DIGITAL GROUND
27
DATA VALID
30 31
AØ A1
Figure 1. ADCDS-1403 Functional Block Diagram
7, 35, 37
ANALOG GROUND
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