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MSK738B Datasheet, PDF (3/5 Pages) M.S. Kennedy Corporation – INVERTING OPERATIONAL AMPLIFIER
APPLICATION NOTES
HEAT SINKING
To determine if a heat sink is necessary for your application and
if so, what type, refer to the thermal model and governing equation
below.
Thermal Model:
The heat sink in this example must have a thermal resistance of
no more than 8.5°C/W to maintain a junction temperature of no
more than +125°C.
OFFSET NULL
Typically, the MSK 738(B) has an input offset voltage of less than
±25µV. If it is desirable to adjust the offset closer to "zero", or to
a value other than "zero", the circuit below is recommended. RP
should be a ten-turn 10KΩ potentiometer. Typical offset adjust is
±5mV.
Governing Equation:
TJ=PD x (RθJC + RθCS + RθSA) + TA
Where
TJ=Junction Temperature
PD=Total Power Dissipation
RθJC=Junction to Case Thermal Resistance
RθCS=Case to Heat Sink Thermal Resistance
RθSA=Heat Sink to Ambient Thermal Resistance
TC=Case Temperature
TA=Ambient Temperature
TS=Sink Temperature
Example:
This example demonstrates a worst case analysis for the op-amp
output stage. This occurs when the output voltage is 1/2 the power
supply voltage. Under this condition, maximum power transfer oc-
curs and the output is under maximum stress.
Conditions:
VCC=±16VDC
VO=±8Vp Sine Wave, Freq.=1KHz
RL=100Ω
For a worst case analysis we will treat the +8Vp sine wave
as an 8VDC output voltage.
1.) Find Driver Power Dissipation
PD=(VCC-VO) (VO/RL)
=(16V-8V) (8V/100Ω)
=0.64W
2.) For conservative design, set TJ=+125°C
3.) For this example, worst case TA=+90°C
4.) RθJC=46°C/W from MSK 738B Data Sheet
5.) RθCS=0.15°C/W for most thermal greases
6.) Rearrange governing equation to solve for RθSA
RθSA=((TJ-TA)/PD) - (RθJC) - (RθCS)
=((125°C -90°C)/0.64W) - 45°C/W - 0.15°C/W
=54.7 - 46.15
=8.5°C/W
Potentiometer values ranging from 1KΩ to 1MΩ can be used with
only a small amount of degradation (typically 0.15 to 0.25µV/°C) of
input offset voltage drift. If the input offset voltage is to be trimmed
to a value other than "zero", the following formula can be used to
approximate the change in input offset voltage drift:
∆VOSD=VOS (trimmed)/250
Recommended External Component Selection Guide
APPROXIMATE
DESIRED GAIN RI(+)
RI(-) Rf(Ext) Cf C1
1
-1
1
-2
1
-5
1
-8
1
-10
1
-20
499Ω
330Ω
169Ω
100Ω
90.9Ω
100Ω
1KΩ
499Ω
200Ω
124Ω
100Ω
100Ω
1KΩ
1KΩ
1KΩ
1KΩ
1KΩ
2KΩ
2 1µf
2 1µf
2 1µf
2 1µf
2 1µf
2 1µf
1 The positive input resistor is selected to minimize any bias current induced offset
voltage.
2 The feedback capacitor will help compensate for stray input capacitance. The value of
this capacitor can be dependent on individual applications. A 2 to 9 pf capacitor is
usually optimum for most applications.
3
Rev. B 6/03