MC33364 Datasheet, PDF (7/14 Pages) ON Semiconductor – Critical Conduction GreenLine SMPS Controller

MC33364
in U1 through Pin 8. The primary current loop is closed by the
transformer’s primary winding, the TMOS switch Q1 and the
current sense resistor R7. The switch Q1 is driven from Pin 6
of U1 through the resistor R4 and the diode D7. The resistor
R4 smooths the switch–on of Q1. The diode D7 ensures a
fast switching–off. The resistors R5, R6, diode D6 and
capacitor C4 create a clamping network that protects Q1
from spikes on the primary winding. The network consisting
of capacitor C3, diode D5 and resistor R1 provides a VCC
supply voltage for U1 from the auxiliary winding of the
transformer. The resistor R1 makes VCC more stable and
resistant to noise. The resistor R2 reduces the current flow
through the internal clamping and protection zener diode of
the Zero Crossing Detector (ZCD) within U1. C3 is the
decoupling capacitor of the supply voltage. The resistor R3
provides bias current for the optoisolator’s transistor. The
diode D8 and the capacitor C5 rectify and filter the output
voltage. The device U2 drives the primary side through the
optoisolator to make the output voltage stable. The output
voltage information is delivered to U2 by a resistive divider
that consists of resistors R10 and R11. The resistor R9 and
the capacitors C7, C8 provide frequency compensation of the
feedback loop.
Since the critical conduction mode converter is a variable
frequency system, the MC33364 has a built–in special block
to reduce switching frequency in the no load condition. This
block is named the ”frequency clamp” block. MC33364 used
in the design example has an internal frequency clamp set to
126 kHz. However, optional versions with a disabled or
variable frequency clamp are available. The frequency clamp
works as follows: the clamp controls the part of the switching
cycle when the MOSFET switch is turned off. If this ”off–time”
(determined by the reset time of the transformer’s core) is too
short, then the frequency clamp does not allow the switch to
turn–on again until the defined frequency clamp time is
reached (i.e., the frequency clamp will insert a dead time).
There are several advantages of the MC33364’s startup
circuit. The startup circuit includes a special high voltage
switch that controls the path between the rectified line
voltage and the VCC supply capacitor to charge that capacitor
by a limited current when the power is applied to the input.
After a few switching cycles the IC is supplied from the
transformer’s auxiliary winding. After VCC reaches the
undervoltage lockout threshold value, the startup switch is
turned off by the undervoltage and the overvoltage control
circuit. Because the power supply can be shorted on the
output, causing the auxiliary voltage to be zero, the MC33364
will periodically start its startup block. This mode is named
”hiccup mode”. During this mode the temperature of the chip
rises but remains protected by the thermal shutdown block.
During the power supply’s normal operation, the high voltage
internal MOSFET is turned off, preventing wasted power, and
thereby, allowing greater circuit efficiency.
Since a bridge rectifier is used, the resulting minimum and
maximum dc input voltages can be calculated:
The maximum average input current is:
+ _{ƪ ƫ} + + Iin
Pout
12 W
[0.8(127 V)]
0.118 A
nVin(min)
where n = estimated circuit efficiency.
A TMOS switch with 600 V avalanche breakdown voltage
is used. The voltage on the switch’s drain consists of the
input voltage and the flyback voltage of the transformer’s
primary winding. There is a ringing on the rising edge’s top of
the flyback voltage due to the leakage inductance of the
transformer. This ringing is clamped by the RCD network.
Design this clamped wave for an amplitude of 50 V. Add
another 50 V to allow a safety margin for the MOSFET. Then
a suitable value of the flyback voltage may be calculated:
+ * * + Vflbk VTMOS Vin(max) 100 V
* * + 600 V 382 V 100 V 118 V
Since this value is very close to the Vin(min), set:
+ + Vflbk Vin(min) 127 V
The Vflbk value of the duty cycle is given by:
ē + ₎ + ₎ + max
Vflbk
Vflbk Vin(min)
127 V
[127 V 127 V]
0.5
The maximum input primary peak current:
+ _ē + + Ippk
2 Iin
[ max]
0.2(0.118 A)
0.5
0.472 A
Choose the desired minimum frequency fmin of operation
to be 70 kHz.
After reviewing the core sizing information provided by a
core manufacturer, a EE core of size about 20 mm was
chosen. Siemens’ N67 magnetic material is used, which
corresponds to a Philips 3C85 or TDK PC40 material.
The primary inductance value is given by:
+ ^ē + + Lp
max Vin(min)
0.5(127 V)
(0.472 A)(70 kHz)
1.92 mH
ǒ Ǔǒ Ǔ Ippk fmin
The manufacturer recommends for that magnetic core a
maximum operating flux density of:
+ Bmax 0.2 T
The cross–sectional area Ac of the EF20 core is:
+ Ac 33.5 mm2
The operating flux density is given by:
+ Bmax
LpIppk
NpAc
+ ^Ǹ + ^{ǒǸ Ǔ} + Vin(min)dc 2 xVin(min)ac
2 (90 Vac) 127 V
+ ^Ǹ + ^{ǒǸ Ǔ} + Vin(_max)dc 2 xVin(_max)ac
2 (270 Vac) 382 V
From this equation the number of turns of the primary
winding can be derived:
+ ^LpIppk
np _BmaxAc
MOTOROLA ANALOG IC DEVICE DATA
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