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MC68331 Datasheet, PDF (66/84 Pages) Motorola, Inc – User’s Manual
Freescale Semiconductor, Inc.
Table 25 SCI Baud Rates
Nominal Baud Rate
64*
110
300
600
1200
2400
4800
9600
19200
38400
76800
Maximum Rate
Actual Rate with
16.78-MHz Clock
64.0
110.0
299.9
599.9
1199.7
2405.0
4810.0
9532.5
19418.1
37449.1
74898.3
524288.0
SCBR Value
$1FFF
$129E
$06D4
$036A
$0165
$00DA
$006D
$0037
$0016
$000E
$0007
$0001
Actual Rate with
20.97-MHz Clock
—
110.0
300.1
600.1
1200.3
2400.6
4783.6
9637.6
19275.3
38550.6
72817.8
655360.0
SCBR Value
—
$1745
$0888
$0444
$0222
$0111
$0089
$0044
$0022
$0011
$0009
$0001
*A rate of 64 baud is not available with a 20.97-MHz system clock. To achieve this rate, the SYNCR can be pro-
grammed to generate a lower system clock rate.
SCCR1 — SCI Control Register 1
$YFFC0A
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
0
0
0
SCBR
RESET:
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
SCCR1 contains SCI configuration parameters. The CPU can read and write this register at any time.
The SCI can modify RWU in some circumstances. In general, interrupts enabled by these control bits
are cleared by reading SCSR, then reading (receiver status bits) or writing (transmitter status bits)
SCDR.
Bit 15 — Not Implemented
LOOPS — Loop Mode
0 = Normal SCI operation, no looping, feedback path disabled
1 = Test SCI operation, looping, feedback path enabled
LOOPS controls a feedback path on the data serial shifter. When loop mode is enabled, SCI transmitter
output is fed back into the receive serial shifter. TXD is asserted (idle line). Both transmitter and receiver
must be enabled before entering loop mode.
WOMS — Wired-OR Mode for SCI Pins
0 = If configured as an output, TXD is a normal CMOS output.
1 = If configured as an output, TXD is an open-drain output.
WOMS determines whether the TXD pin is an open-drain output or a normal CMOS output. This bit is
used only when TXD is an output. If TXD is used as a general-purpose input pin, WOMS has no effect.
ILT — Idle-Line Detect Type
0 = Short idle-line detect (start count on first one)
1 = Long idle-line detect (start count on first one after stop bit(s))
66
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