MC44463 Datasheet, PDF (6/8 Pages) Motorola, Inc – REPLAY AND MULTIPLE PICTURE–IN–PICTURE (PIP) CONTROLLER

MC44463
PIP On/PIP Blank Register
Sub–address = 05h
PIP On Bits (PON0–3) – D4–D3
When on (1) turns the corresponding PIP display on.
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ _{PON (3:0)}
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ₀₀₀₀
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ₀₀₀₁
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ₀₀₁₀
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ₀₁₀₀
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ₁₀₀₀
1/16 Size
No PIP
Top = On
2nd from Top = On
3rd from Top = On
4th from Top = On
1/9 Size
No PIP
Top = On
2nd from Top = On
3rd from Top = On
3rd from Top = On
PIP Blanking Bits (PBL0–3) – D4–D7
When on (1) sets the corresponding PIP to black. If the
individual PIP is off, then it will be black when it is turned on.
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ _{PBL (7:4)}
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ₀₀₀₀
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ₀₀₀₁
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ₀₀₁₀
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ₀₁₀₀
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ₁₀₀₀
Function
PIP Picture Normal
Top = Blanked (Set to Black)
2nd from Top = Blanked (Set to Black)
3rd from Top = Blanked (Set to Black)
4th from Top = Blanked (Set to Black)
PIP X Position Register
Sub–address = 06h
X Position Bits (XPS0–5) – D0–D5
Moves the PIP start position from the left to the right
edge of the display in 64 steps. There is protection circuitry
to prevent the PIP from interfering with the main picture
sync pulses.
PIP Y Position Register
Sub–address = 07h
Y Position Bits (YPS0–5) – D0–D5
Moves the PIP start position from the top to the bottom
edge of the display in 64 steps. There is protection circuitry to
prevent the PIP from interfering with the main picture sync
pulses.
PIP Chroma Level Register
Sub–address = 08h
Chroma (C0–5) – D0–D5
The color of the PIP can be adjusted to suit viewer
preference by setting the value stored in these bits. A total of
64 steps varies the color from no color to maximum. This
control acts in conjunction with the auto phase control.
PIP Tint Level Register
Sub–address = 09h
Tint (T0–5) – D0–D5
An auto phase control compares the main color burst to
the internally generated pseudo color burst so that the tints
are matched. In addition to this, the tint of the PIP can be
varied ±10° in a total of 64 steps by changing the value of
these bits to suit viewer preference.
PIP Luma Delay Register
Sub–address = 0Ah
Y Delay (YDL0–2) – D0–D2
Since the Chroma passes through a bandpass filter and
the color decoder, it is delayed with respect to the Luma
signal. Therefore, to time match the Luma and Chroma these
bits are set to a single value determined to be correct in the
application.
PIP Acquire/Playback Register
Sub–address = 0Bh
PIP Acquire Speed Bits (ACQ_SP0–1) – D0–D1
These select the speed of the video acquisition. This is
only active when RE_AQ = 1.
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ACQ_SP (1:0)
Function
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ 00
Acquire 1 Out of Every 4 Fields
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ⁰¹
Acquire 1 Out of Every 6 Fields
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ¹⁰
Acquire 1 Out of Every 8 Fields
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ¹¹
Acquire 1 Out of Every 10 Fields
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ PIP Save/Clear Bit (RE_AQ) –D2
This bit controls the save and clear function for the instant
replay. The bit value 1 is only effective when PON0–3 = 0000.
(No PIP display.)
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ _{RE_AQ (2:2)}
Function
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ₀
Save Memory
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ₁
Clear Reacquire
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ _{PIP Playback Speed Bits (PB_SP0–1) – D4–D5}
These bits control the relative playback speed, to the
acquired speed.
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ _{PB_SP (5:4)}
Function
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ₀₀
Playback at 1 x ACQ_SP Speed
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ₀₁
Playback at 1/2 x ACQ_SP Speed
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ₁₀
Playback at 1/4 x ACQ_SP Speed
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ₁₁
Playback at 1/8 x ACQ_SP Speed
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ _{PIP Playback Control Bit (PB) – D6}
This bit controls the start/stop of the instant replay
function.
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ _{PB (6:6)}
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ₀
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ₁
Function
No Action
Instant Replay Activated
PIP Fill/Background/Free Run/Test Register
Sub–address = 0Ch
PIP Fill Bits (PIPFILL0–1) – D0–D1
May be used to fill the PIP with one of three selectable
solid colors
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ _{PIPFILL (1:0)}
Function
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ₀₀
Normal
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ₀₁
Red
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ₁₀
Green
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ₁₁
Blue
Test Register Bits (INTC0 and MACR0) – D6–D7
When the FRUN is set to 1 the circuitry provides a
generated sync and displays a flat field that can be either
dark blue or gray determined by the BGND bit.
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ _{BGND (2:2)}
Function
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ₀
Blue
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ₁
50% White
6
MOTOROLA ANALOG IC DEVICE DATA