MC145181 Datasheet, PDF (38/71 Pages) Motorola, Inc – Dual 550/60 MHz PLL Frequency Synthesizer with DACs and Voltage Multiplier

Freescale S_Me_Cm₁₄i₅c₁o₈n₁ ductor, Inc.
Figure 35. Behavioral Model of the Phase Frequency Detector
HB1
V1
RSFF1
Delay
Out
Ref
In Out
V2
S
P1
R_φ
R
Pulse Generator
Delay
If [V(Q1)>=1 & V(Q2)>=1, 5, 0]
Out
In
Delay
HB2
In
In Out
V2
Out
V1
Pulse Generator
RSFF2
R
P1
V_φ
S
Figure 36. Behavioral Block Used for the
Pulse Generator
v1
v1
If (V(v1) ≥ 1 | V(v2) < 1, 5, 0)
Out
v2
v2
Figure 37. Behavioral Block Used as an RS Flip–flop
S
In1
In2
R
If [V(In1)>=1 & V(In2)<1 | V(In2)<1, 5]
If [V(In2)>=1, 0]
If [V(In3)>=1 & V(In2)<1, 5, 0]
Qout
In3
If [V(Q)>=1, 5, 0]
38
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