MC145181 Datasheet, PDF (1/71 Pages) Motorola, Inc – Dual 550/60 MHz PLL Frequency Synthesizer with DACs and Voltage Multiplier

Freescale Semiconductor, Inc_O._{rder this document by MC145181/D}
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Advance Information
MC145181
Dual 550/60 MHz PLL
Frequency Synthesizer with
DACs and Voltage Multiplier
The MC145181 is a dual frequency synthesizer containing very–low
supply voltage circuitry. The device supports two independent loops with a
single input reference and operates down to 1.8 V. Phase noise reduction
circuitry is incorporated into the device.
The MC145181 operates up to 550 MHz on the main loop and up to
60 MHz on the secondary loop. The device has a 32/33 prescaler for the
main loop. Lock detection circuitry for both loops is multiplexed to a single
output.
Two 8–bit DACs are powered through a dedicated pin. The DAC supply
range is 1.8 to 3.6 V; this voltage may differ from the main supply.
An on–chip voltage multiplier supplies power to the phase/frequency
detectors. Thus, in a 2 V application, the detectors are supplied with 4 V
power. In 2.6 to 3.6 V applications, the multiplied voltage is regulated at
approximately 5 V. The current source/sink phase/frequency detector for the
main loop is designed to achieve faster lock times than a conventional
detector. Both high and low current outputs are available along with a timer,
double buffers, and a MOSFET switch to adjust the external low–pass filter
response.
There are several levels of standby which are controllable with a 1–byte
transfer through the serial port. Either of the PLLs and/or the reference
oscillator may be independently placed in the low–power standby state. In
addition, any of the phase/frequency detector outputs may be placed in the
floating state to facilitate modulation of the external VCOs. Either DAC may
be placed in standby via a 4–byte transfer.
The MC145181 facilitates designing the receiver’s first and second local
oscillators for ReFLEX™ two–way paging applications. Also, the device
accommodates generation of the transmit carrier.
• Operating Frequency
Main Loop: 100 to 550 MHz
Secondary Loop: 10 to 60 MHz
• Operating Supply Voltage: 1.8 to 3.6 V
• Nominal Supply Current, Both Loops Active: 3 mA
• Maximum Standby Current, All Systems Shut Down: 10 µA
• Phase Detector Output Current:
w1.8 V Supply — PDout–Hi: 2.8 mA, PDout–Lo: 0.7 mA
2.5 V Supply — PDout–Hi: 4.4 mA, PDout–Lo: 1.1 mA
• Two Independent 8–Bit DACs with Separate Supply Pin (Up to 3.6 V)
• Lock Detect Output with Adjustable Lock Indication Window
• Independent R Counters Allow Independent Step Sizes for Each Loop
• Main Loop Divider Range: 992 to 262,143
• Secondary Loop Divider Range: 7 to 8,191
• Fractional Reference Counters Divider Range: 20 to 32,767.5
• Auxiliary Reference Divider with Small–Signal Differential
Output — Ratios: 8, 10, 12.5
• Three General–Purpose Outputs
• Direct Interface to Motorola SPI Data Port Up to 10 Mbps
BiCMOS COMPONENT
FOR 2 OR 3 VOLT
SYSTEMS
SEMICONDUCTOR
TECHNICAL DATA
32 1
(Scale 2:1)
PLASTIC PACKAGE
CASE 873C
(LQFP–32, Tape & Reel Only)
VERY–SMALL 5 x 5 mm BODY
DEVELOPMENT SYSTEM
The MC145230EVK, which contains hardware and
software, is strongly recommended for system
development. (The user must provide the VCOs for
evaluating the MC145181.) The software supports
all features and modes of operation of the device. Up
to four boards or devices can be controlled and the
user is alerted to error conditions. The control
program may be used with any board based on the
MC145181, MC145225, or MC145230.
ORDERING INFORMATION
Device
Main/Secondary
Loop
Maximum
Frequency
Package
MC145181FTAR2 550/60 MHz LQFP–32
ReFLEX and BitGrabber are trademarks of Motorola, Inc.
This document contains information on a new product. Specifications and information herein
© Motorola, Inc. 1999
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