MC68349 Datasheet, PDF (3/7 Pages) Motorola, Inc – HIGH PERFORMANCE INTEGRATED PROCESSOR

Freescale Semiconductor, Inc.
The primary features of the MC68349 include:
• High-Performance CPU030 Processor
—CPU32+ 32-Bit Execution Unit
M68000 Upward User Code Compatible
32-Bit Bus Interface
Two-Clock Instruction Execution Rate
—Configurable Instruction Cache (CIC)
Four Independent Blocks, Each Configurable as Cache or SRAM
1-Kbyte Instruction Cache or 2-Kbyte SRAM Total Storage
Four-Way Set Associative (All Blocks Configured as Cache)
Each Block Independently Lockable
Supports Simultaneous CPU and DMA Bus Activity
—Quad Data Memory Module (QDMM)
Four Independent 1-Kbyte SRAM Blocks
Useful for Scratchpad, Variable Storage, and Stacks
Each Block Independently Mapped and Protected
• High-Speed 32-Bit Dual DMA Controllers for Low-Latency Data Transfers
—Full 32-Bit Data Transfers for Highest Performance
—50-Mbyte/Sec Sustained Transfer Rate
—Dual or Single Address Transfers
—8-, 16-, or 32-Bit Transfers
• Dual Serial Communication Ports
—Synchronous or Asynchronous Operation
—3-Mbit/Sec Sustained Transfer Rate
—Modem Control
—Baud Rate Generation
—MC68681/MC2681 Compatible
• System Integration Module for Flexible and Cost-Effective System Interface
—32-Bit Address Bus
—32-Bit Data Bus with Dynamic Bus Sizing
—System Protection, Reset, and Configuration Control
—Chip-Select, Wait State Generation, Bus Watchdog
—Periodic Interrupt/System Timer
—Interrupt Controller
—Dual 8-Bit Parallel Ports
—IEEE 1149.1 Boundary Scan (JTAG)
• Power Management
—5 V or 3.3 V Operation
—Fully Static HCMOS Technology
—Programmable Clock Synthesizer for Full Frequency Control
—Power-Down/Low Power Stop Capabilities
—Idle Modules Can Be Individually Powered Down
• 32-Bit Data Paths for On-Chip and Off-Chip Access
• 0–16- or 25-MHz Operation
• 160-Pin Plastic QFP
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MC68349 PRODUCT INFORMATION
For More Information On This Product,
Go to: www.freescale.com
MOTOROLA