MC13110A Datasheet, PDF (26/68 Pages) Motorola, Inc – UNIVERSAL CORDLESS TELEPHONE SUBSYSTEM IC

MC13110A/B MC13111A/B
Second Local Oscillator
The 2nd LO is a CMOS oscillator. It is used as the PLL
reference oscillator and local oscillator for the second
frequency conversion in the RF receiver. It is designed to
utilize an external parallel resonant crystal. See schematic in
Figure 39.
Figure 39. Second Local Oscillator Schematic
2nd LO
RPI
CPI
Gm
CPO RPO
LO2 In
LO2 Out
Xtal
C1
C2
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ _{Figure 40. Second Local Oscillator}
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ _{Input and Output Impedance}
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ _{Input Impedance (RPI // CPI)}
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ _{Output Impedance (RPO // CPO)}
11.6 kΩ // 2.9 pF
9.6 kΩ // 2.7 pF
Figure 41 shows a typical gain/phase response of the
second local oscillator. Load capacitance (CL), equivalent
series resistance (ESR), and even supply voltage will have
and affect on the 2nd LO response as shown in Figures 45
and 46. Except for the standby mode open loop gain is fairly
constant as supply voltage increases from 2.5 V. This is due
to the regulated voltage of 2.5 V on PLL Vref. From the graphs
it can seen that optimum performance is achieved when C1
equals C2 (C1/C2 = 1).
Figure 46 represents the ESR versus crystal load
capacitance for the 2nd LO. This relationship was defined by
using a 6.0 dB minimum loop gain margin at 3.6 V. This is
considered the minimum gain margin to guarantee oscillator
start–up.
Oscillator start–up is also significantly affected by the
crystal load capacitance selection. In Figures 42 and 43 the
relationship between crystal load capacitance, supply
voltage, and external load capacitance ratio (C2/C1), can be
seen. The lower the load capacitance the better the
performance.
Given the desired crystal load capacitance, C1 and C2
can be determined from Figure 47. It is also interesting to
point out that current consumption increases when C1 ≠ C2,
as shown in Figure 44.
Be careful not to overdrive the crystal. This could cause a
noise problem. An external series resistor on the crystal
output can be added to reduce the drive level, if necessary.
SECOND LOCAL OSCILLATOR
Figure 41. Second LO Gain/Phase @ –10 dBm
15
10
5.0
10.24 MHz Crystal
CL = 10 pF
Gain
0
RS = 20 Ω
C1 = C2 = 15 pF
–5.0
–10
–15
Phase
–20
–25
10.235
10.24
f, FREQUENCY (MHz)
90
67.5
45
22.5
0
–22.5
–45
–67.5
–90
10.245
Figure 42. Start–Up Time versus Capacitor
Ratio, Inactive to Rx Mode
6.0
10.24 MHz Crystal
5.0
CL = 10 pF
RS = 20 Ω
4.0
VCC = 2.3 V
3.0
VCC = 2.7 V
2.0
VCC = 3.6 V
1.0
VCC = 5.0 V
0
0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0
CAPACITOR RATIO (C2:C1)
26
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