MC74F803 Datasheet, PDF (2/5 Pages) Motorola, Inc – CLOCK DRIVER QUAD D-TYPE FLIP-FLOP WITH MATCHED PROPAGATION DELAYS

MC74F803
FUNCTIONAL DESCRIPTION
The F803 consists of four positive edge-triggered flip-flops
with individual D-type inputs and inverting outputs. The
buffered clock is common to all flip-flops and the following
specifications allow for outputs switching simultaneously. The
four flip-flops store the state of their individual D inputs that
meet the setup and hold time requirements on the
LOW-to-HIGH Clock (CP) transition. The maximum frequency
of the clock input is 70 megahertz, and the LOW-to-HIGH and
HIGH-to-LOW propagation delays of the O1 output vary by, at
most, 1 nanosecond. Therefore, the device is ideal for use as
a divide-by-two driver for high-frequency clock signals that
require symmetrical duty cycles. The difference between the
LOW-to-HIGH and HIGH-to-LOW propagation delays for the
O0, O2, and O3 outputs vary by at most 1.5 nanoseconds.
These outputs are very useful as clock drivers for circuits with
less stringent requirements. In addition, the output-to-output
skew is a maximum of 1.5 nanoseconds. Finally, the IOH
specification at 2.5 volts is guaranteed to be at least – 20
milliamps. If their inputs are identical, multiple outputs can be
tied together and the IOH is commensurately increased.
DC CHARACTERISTICS OVER OPERATING TEMPERATURE RANGE (unless otherwise specified)
Limits
Symbol
Parameter
Min
Typ Max Unit
Test Conditions*
VIH
VIL
VIK
VOH
VOL
IIH
IIL
IOS
Input HIGH Voltage
Input LOW Voltage
Input Clamp Diode Voltage
Output HIGH Voltage
Output LOW Voltage
Input HIGH Current
Input LOW Current
Output Short Circuit Current
(Note 2)
2.0
—
—
V Guaranteed Input HIGH Voltage
—
—
0.8
V Guaranteed Input LOW Voltage
—
—
– 1.2
V IIN = –18 mA
2.5
—
—
V IOH = –20 mA
—
0.35 0.5
V IOL = 24 mA
—
—
20
µA VIN = 2.7 V
—
—
100
VIN = 7.0 V
—
—
–0.6 mA VIN = 0.5 V
–60
— –150 mA VOUT = 0 V
VCC = MIN
VCC = 4.5 V
VCC = MIN
VCC = MAX
VCC = MAX
VCC = MAX
VCC = MAX
ICC
Power Supply Current
—
—
70
mA VCC = MAX
* Normal test conditions for this device are all four outputs switching simultaneously. Two outputs of the 74F803 can be tied together and the
IOH doubles.
1. For conditions such as MIN or MAX, use the appropriate value specified under guaranteed operating ranges.
2. Not more than one output should be shorted at a time, nor for more than 1 second.
AC CHARACTERISTICS (TA = 0 to 70°C, VCC = 5.0 V ± 10%, see Note 1)
Symbol
Parameter
CL = 50 pF
CL = 100 pF
Min Max Min Max
Unit
fmax
Maximum Clock Frequency
70
—
50
—
MHz
tPLH
tPHL
Propagation Delay CP to On
3.0
7.5
3.0
10
ns
tPv
Propagation Delay CP to On Variation (see Note 3)
—
3.0
—
4.0
ns
tps O1
Propagation Delay Skew |tPLH Actual – tPHL Actual|
for O1 Only
—
1.0
—
2.0
ns
tps O0,
O2, O3
Propagation Delay Skew |tPLH Actual – tPHL Actual|
for O0, O2, O3
—
1.5
—
2.0
ns
tos
Output to Output Skew (see Note 2) |tp On – tp Om|
—
1.5
—
2.5
ns
trise, tfall
O1
Rise/Fall Time for O1 (0.8 to 2.0 V)
—
3.0
—
4.0
ns
trise, tfall Rise/Fall Time for O0, O2, O3 (0.8 to 2.0 V)
O0, O2, O3
—
3.5
—
4.5
ns
1. The test conditions used are all four outputs switching simultaneously. The AC characteristics described above (except for O1) are also
guaranteed when two outputs are tied together.
2. Where tp On and tp Om are the actual propagation delays (any combination of high or low) for two separate outputs from a given high
transition of CP.
3. For a given set of conditions (i.e., capacitive load, temperature, VCC, and number of outputs switching simultaneously) the variation from
device to device is guaranteed to be less than or equal to the maximum.
MOTOROLA
2
TIMING SOLUTIONS
BR1333 — REV 4