MC33997 Datasheet, PDF (14/20 Pages) Motorola, Inc – Switching Power Supply with Linear Regulators

Freescale Semiconductor, Inc.
Power-On Reset Timer
This timer starts to time out at the end of the soft-start period
if the V_DDH and V_DDL outputs are in the valid regulation range.
If the timer “times out”, then the open-drain PWROK signal is
released, indicating that “power is ON”.
Supervisory Circuits PWROK and VKAMOK
The 33997 has two voltage monitoring open-drain outputs,
the PWROK and the VKAMOK pins. PWROK is "active high".
This output is pulled low when either of the regulator outputs
(V_DDH or V_DDL) are below their regulation windows. If both
regulator outputs are above their respective lower thresholds,
and the Power-On Reset Timer has expired, the output driver is
turned off and this pin is at high-impedance state (see
Figure 6).
The VKAMOK signal indicates a severe fault condition on
the keep-alive regulator output V_KAM. The V_KAM output voltage
is compared to the internal bandgap reference voltage. When
the V_KAM falls below the bandgap reference voltage level, the
VKAMOK signal is pulled low.
33997
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