MTW45N10E Datasheet, PDF (1/8 Pages) Motorola, Inc – TMOS POWER FET 45 AMPERES 100 VOLTS RDS(on) = 0.035 OHM

MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
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by MTW45N10E/D
™ Designer's Data Sheet
TMOS E-FET.™
Power Field Effect Transistor
TO-247 with Isolated Mounting Hole
N–Channel Enhancement–Mode Silicon Gate
This advanced TMOS E–FET is designed to withstand high
energy in the avalanche and commutation modes. The new energy
efficient design also offers a drain–to–source diode with a fast
recovery time. Designed for low voltage, high speed switching
applications in power supplies, converters and PWM motor
controls, these devices are particularly well suited for bridge circuits
where diode speed and commutating safe operating areas are
critical and offer additional safety margin against unexpected
voltage transients.
• Avalanche Energy Specified
• Source–to–Drain Diode Recovery Time Comparable to a
Discrete Fast Recovery Diode
• Diode is Characterized for Use in Bridge Circuits
G
• IDSS and VDS(on) Specified at Elevated Temperature
• Isolated Mounting Hole Reduces Mounting Hardware
®
D
S
MTW45N10E
Motorola Preferred Device
TMOS POWER FET
45 AMPERES
100 VOLTS
RDS(on) = 0.035 OHM
CASE 340K–01, Style 1
TO–247AE
MAXIMUM RATINGS (TC = 25°C unless otherwise noted)
Rating
Drain–Source Voltage
Drain–Gate Voltage (RGS = 1.0 MΩ)
Gate–Source Voltage — Continuous
Gate–Source Voltage — Non–Repetitive (tp ≤ 10 ms)
Symbol
Value
Unit
VDSS
100
Vdc
VDGR
100
Vdc
VGS
± 20
Vdc
VGSM
± 40
Vpk
Drain Current — Continuous
Drain Current — Continuous @ 100°C
Drain Current — Single Pulse (tp ≤ 10 µs)
Total Power Dissipation
Derate above 25°C
ID
45
Adc
ID
34.6
IDM
135
Apk
PD
180
Watts
1.44
W/°C
Operating and Storage Temperature Range
TJ, Tstg – 55 to 150
°C
Single Pulse Drain–to–Source Avalanche Energy — Starting TJ = 25°C
(VDD = 25 Vdc, VGS = 10 Vdc, IL = 45 Apk, L = 0.8 mH, RG = 25 Ω)
EAS
810
mJ
Thermal Resistance — Junction to Case
Thermal Resistance — Junction to Ambient
R_θJC
R_θJA
0.70
°C/W
62.5
Maximum Lead Temperature for Soldering Purposes, 1/8″ from case for 10 seconds
TL
260
°C
Designer’s Data for “Worst Case” Conditions — The Designer’s Data Sheet permits the design of most circuits entirely from the information presented. SOA Limit
curves — representing boundaries on device characteristics — are given to facilitate “worst case” design.
E–FET and Designer’s are trademarks of Motorola, Inc. TMOS is a registered trademark of Motorola, Inc.
Preferred devices are Motorola recommended choices for future use and best overall value.
REV 2
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