MC74VHC574 Datasheet, PDF (1/7 Pages) Motorola, Inc – Octal D-Type Flip-Flop with 3-State Output

MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
Octal D-Type Flip-Flop
with 3-State Output
The MC74VHC574 is an advanced high speed CMOS octal flip–flip with
3–state output fabricated with silicon gate CMOS technology. It achieves
high speed operation similar to equivalent Bipolar Schottky TTL while
maintaining CMOS low power dissipation.
This 8–bit D–type flip–flop is controlled by a clock input and an output
enable input. When the output enable input is high, the eight outputs are in a
high impedance state.
The internal circuit is composed of three stages, including a buffer output
which provides high noise immunity and stable output. The inputs tolerate
voltages up to 7V, allowing the interface of 5V systems to 3V systems.
• High Speed: fmax = 180MHz (Typ) at VCC = 5V
• Low Power Dissipation: ICC = 4µA (Max) at TA = 25°C
• High Noise Immunity: VNIH = VNIL = 28% VCC
• Power Down Protection Provided on Inputs
• Balanced Propagation Delays
• Designed for 2V to 5.5V Operating Range
• Low Noise: VOLP = 1.2V (Max)
• Pin and Function Compatible with Other Standard Logic Families
• Latchup Performance Exceeds 300mA
• ESD Performance: HBM > 2000V; Machine Model > 200V
• Chip Complexity: 266 FETs or 66.5 Equivalent Gates
DATA
INPUTS
LOGIC DIAGRAM
D0 ²
D1 ³
D2 ⁴
D3 ⁵
D4 ⁶
D5 ⁷
D6 ⁸
D7 ⁹
19 _Q0
18 _Q1
17 _Q2
16 _Q3
15 _Q4
14 _Q5
13 _Q6
12 _Q7
CP ¹¹
NONINVERTING
OUTPUTS
OE ¹
FUNCTION TABLE
INPUTS
OE
CP
D
L
H
L
L
L
L, H,
X
H
X
X
OUTPUT
Q
H
L
No Change
Z
MC74VHC574
DW SUFFIX
20–LEAD SOIC PACKAGE
CASE 751D–04
DT SUFFIX
20–LEAD TSSOP PACKAGE
CASE 948E–02
M SUFFIX
20–LEAD SOIC EIAJ PACKAGE
CASE 967–01
ORDERING INFORMATION
MC74VHCXXXDW SOIC
MC74VHCXXXDT TSSOP
MC74VHCXXXM
SOIC EIAJ
PIN ASSIGNMENT
OE 1
D0 2
D1 3
D2 4
D3 5
D4 6
D5 7
D6 8
D7 9
GND 10
20 VCC
19 Q0
18 Q1
17 Q2
16 Q3
15 Q4
14 Q5
13 Q6
12 Q7
11 CP
6/97
© Motorola, Inc. 1997
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