MC74HC20A Datasheet, PDF (1/5 Pages) ON Semiconductor – Dual 4-Input NAND Gate

MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
Advance Information
Dual 4-Input NAND Gate
High–Performance Silicon–Gate CMOS
The MC74HC20A is identical in pinout to the LS20. The device inputs are
compatible with standard CMOS outputs; with pullup resistors, they are
compatible with LSTTL outputs.
• Output Drive Capability: 10 LSTTL Loads
• Outputs Directly Interface to CMOS, NMOS, and TTL
• Operating Voltage Range: 2 to 6 V
• Low Input Current: 1 µA
• High Noise Immunity Characteristic of CMOS Devices
• In Compliance with the Requirements Defined by JEDEC Standard
No. 7A
• Chip Complexity: 28 FETs or 7 Equivalent Gates
LOGIC DIAGRAM
A1
B1
C1
D1
1
2
4
5
A2
B2
C2
D2
9
10
12
13
6 _Y1
Y = ABCD
8 _Y1
PIN 14 = VCC
PIN 7 = GND
PINS 3, 11 = NO CONNECTION
MC74HC20A
14
1
14
1
N SUFFIX
PLASTIC PACKAGE
CASE 646–06
D SUFFIX
SOIC PACKAGE
CASE 751A–03
14
1
DT SUFFIX
TSSOP PACKAGE
CASE 948G–01
ORDERING INFORMATION
MC74HCXXAN
MC74HCXXAD
MC74HCXXADT
Plastic
SOIC
TSSOP
PIN ASSIGNMENT
A1 1
B1 2
NC 3
C1 4
D1 5
Y1 6
GND 7
14 VCC
13 D2
12 C2
11 NC
10 B2
9 A2
8 Y2
FUNCTION TABLE
Inputs
Output
A
B
C
D
Y
L
X
X
X
H
X
L
X
X
H
X
X
L
X
H
X
X
X
L
H
H
H
H
H
L
This document contains information on a new product. Specifications and information herein are subject to
change without notice.
1/98
© Motorola, Inc. 1997
1
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