MC54-74HC157A Datasheet, PDF (1/7 Pages) Motorola, Inc – High–Performance Silicon–Gate CMOS

MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
Quad 2-Input Data
Selectors/Multiplexers
High–Performance Silicon–Gate CMOS
The MC54/74HC157A is identical in pinout to the LS157. The device
inputs are compatible with standard CMOS outputs; with pullup resistors,
they are compatible with LSTTL outputs.
This device routes 2 nibbles (A or B) to a single port (Y) as determined by
the Select input. The data is presented at the outputs in noninverted form. A
high level on the Output Enable input sets all four Y outputs to a low level.
The HC157A is similar in function to the HC257 which has 3–state outputs.
• Output Drive Capability: 10 LSTTL Loads
• Outputs Directly Interface to CMOS, NMOS, and TTL
• Operating Voltage Range: 2.0 to 6.0 V
• Low Input Current: 1.0 µA
• High Noise Immunity Characteristic of CMOS Devices
• In Compliance with the Requirements Defined by JEDEC Standard
No. 7A
• Chip Complexity: 82 FETs or 20.5 Equivalent Gates
LOGIC DIAGRAM
NIBBLE
A INPUTS
NIBBLE
B INPUTS
A0 ²
A1 ⁵
A2 ¹¹
A3 ¹⁴
B0 ³
B1 ⁶
B2 ¹⁰
B3 ¹³
4 _Y0
7 _Y1
9 _Y2
12 _Y3
DATA
OUTPUTS
SELECT
OUTPUT
ENABLE
1
15
PIN 16 = VCC
PIN 8 = GND
MC54/74HC157A
16
1
J SUFFIX
CERAMIC PACKAGE
CASE 620–10
16
1
16
1
N SUFFIX
PLASTIC PACKAGE
CASE 648–08
D SUFFIX
SOIC PACKAGE
CASE 751B–05
16
1
DT SUFFIX
TSSOP PACKAGE
CASE 948F–01
ORDERING INFORMATION
MC54HCXXXAJ
MC74HCXXXAN
MC74HCXXXAD
MC74HCXXXADT
Ceramic
Plastic
SOIC
TSSOP
PIN ASSIGNMENT
SELECT 1
A0 2
B0 3
Y0 4
A1 5
B1 6
Y1 7
GND 8
16 VCC
15
OUTPUT
ENABLE
14 A3
13 B3
12 Y3
11 A2
10 B2
9 Y2
FUNCTION TABLE
Inputs
Output
Outputs
Enable Select Y0 – Y3
H
X
L
L
L A0 – A3
L
H B0 – B3
X = don’t care
A0 – A3, B0 – B3 = the levels
of the respective Data–Word
Inputs.
2/97
© Motorola, Inc. 1997
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