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MC145170-2 Datasheet, PDF (1/32 Pages) Motorola, Inc – PLL Frequency Synthesizer with Serial Interface
Technical Data
MC145170-2/D
Rev. 4, 02/2003
PLL Frequency
Synthesizer with Serial
Interface
Freescale Semiconductor, Inc.
MC145170-2
D SUFFIX
CASE 751B
P SUFFIX
CASE 648
DT SUFFIX
CASE 948C
Ordering Information
Device
MC145170P2
MC145170D2
MC145170DT2
Operating
Temp Range
TA = -40 to 85°C
Package
Plastic DIP
SOG-16
TSSOP-16
Contents:
1 Introduction . . . . . . . . . . 1
2 Specifications . . . . . . . . 3
3 Pin Connections . . . . . 10
4 Design Considerations 18
5 Packaging. . . . . . . . . . . 30
1 Introduction
The new MC145170-2 is pin-for-pin compatible with the MC145170-1. A comparison of the
two parts is shown in the table below. The MC145170-2 is recommended for new designs
and has a more robust power-on reset (POR) circuit that is more responsive to momentary
power supply interruptions. The two devices are actually the same chip with mask options for
the POR circuit. The more robust POR circuit draws approximately 20 µA additional supply
current. Note that the maximum specification of 100 µA quiescent supply current has not
changed.
The MC145170-2 is a single-chip synthesizer capable of direct usage in the MF, HF, and
VHF bands. A special architecture makes this PLL easy to program. Either a bit- or byte-
oriented format may be used. Due to the patented BitGrabber registers, no address/steering
bits are required for random access of the three registers. Thus, tuning can be accomplished
via a 2-byte serial transfer to the 16-bit N register.
The device features fully programmable R and N counters, an amplifier at the fin pin, on-chip
support of an external crystal, a programmable reference output, and both single- and double-
ended phase detectors with linear transfer functions (no dead zones). A configuration (C)
register allows the part to be configured to meet various applications. A patented feature
allows the C register to shut off unused outputs, thereby minimizing noise and interference.
In order to reduce lock times and prevent erroneous data from being loaded into the counters,
a patented jam-load feature is included. Whenever a new divide ratio is loaded into the N
register, both the N and R counters are jam-loaded with their respective values and begin
counting down together. The phase detectors are also initialized during the jam load.
• Operating Voltage Range: 2.7 to 5.5 V
© Motorola, Inc., 2003. All rights reserved.
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