MSS0306-1 Datasheet, PDF (5/19 Pages) Mosel Vitelic, Corp – 3 VOICE ROM

MOSEL VITELIC
MSS0306
whenever this chip is power on. "Initial high" means
vice versa.
Initial high is good for LED because that high will
forbid the LED to be turned on, user want not keep the
LED light even user don't use very long time since
user power on the chip. So, we suggest user to
define "initial high" whenever LED is chosen for that
OUT pin. But it is not absolutely right. User may on
purpose turn it on once user likes it.
Initial low is good for STATUS because that low will
have every Status starts from zero on whole time line.
So, user are suggested to define "initial low"
whenever Status is chosen for that OUT pin. But it is
not absolutely right. User may on purpose have a
high to do whatever user want, to turn a motor running
this way or tell a situation since power on, etc.
DC 0 & DC 1
This is a function belongs to OUTs. User may be con-
fused it with Busy. It is similar to Busy signal but it is
not only valid during audio is being played, like Busy,
but also valid after the audio has been played. Its res-
ponse lasts until next audio entry is activated.
DC0 means zero potential (Vss) while the DC1 means
the Vdd.
Sample Rate
There are some parameters depend on sample rate.
They are debounce time, LED Ring frequency, LED fix
flash frequency and Stop pulse width. The numbers
mentioned in this data sheet are based on 6 KHz
sample rate if not specified. Higher SR has LED
flashes quicker. Higher SR makes Stop pulse shorter.
Higher SR let the debounce time shorter.
This chip provides multi-SR function. What it means
is that user can digitize two different sounds in
different SR but plays them by a common Rosc. For
example, user has rocket sound digitized in 9.5 KHz
but have rooster digitized at 6KHz. While
manufactured, user just specify different pitch
numbers on request form - 4 for rocket and 1 for
rooster. The chip could be played those two sounds
at a Rosc fit for 6 KHz SR. Because that "pitch 4" at 6
KHz Rosc means 6 KHz playback while "pitch 1" at 6
KHz Rosc meas playback in 1.6 times 6 KHz.
The 1.2 M ohm Rosc playback 6 KHz sample rate
typically, but just typical. Smaller Rosc playbacks
quicker - Higher pixel rate. MVI provides voice chip
with very flat response for playback vs working
voltage. Higher working voltage get slower playback
but insignificantly.
Stop Pulse
Stop pulse is one of Status definition. There never is
this pulse o/p if user defines this o/p pins as LEDs.
This Stop pulse is not guaranteed when user defines the
trigger behavior as Holdable. Stop pulse width is deter-
mined on the sample rate as well as the pitch of that play-
ing entry when stop pulse occurs.
Higher Key Priority
What's the result when multi triggers are activated simul-
taneously? Which trigger is acknowledged among these
five? Among these four? Among these three? Between
these two?
The higher key priority means the trigger with higher index
has the priority to be acknowledged and responsed when
there are several triggers activated simultaneously.
For example: Three triggers are activated simultaneously,
TG1,2,3. The TG3 has the priority, sentence 3 will be res-
ponsed.
For another example: Five triggers are activated simultan-
eously, TG1,2,3,4,5. The TG5 has the priority, sentence 5
will be responsed.
First Key Priority
This feature is not provided on this MSS0306 chip. But it
still worth to explain.
This defines the relationship on time line for two or more
triggers. While user activating a trigger, for example
TG1, and its sound plays, user is unable to activate the
other trigger once the TG1 is kept activated regardless
TG1's sound is finished or not.
It means first TGn prohibits the acknowledge of latter
TGms when TGn is kept true.
Last Key Priority
This defines the relationship on time line for two or more
triggers. What will it result when a trigger is activated
while a trigger is true ahead and kept true ?
While user already activates a trigger, for example TG1,
and keeps this TG1 true, the latter trigger is still able to
come in and acknowledged by chip. It means the last
trigger is not prohibited by formers.
See timing diagram VII for reference.
User may be confused it with "retrigger". They are
different.
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