V58C265804S Datasheet, PDF (28/44 Pages) Mosel Vitelic, Corp – HIGH PERFORMANCE 2.5 VOLT 8M X 8 DDR SDRAM 4 BANKS X 2Mbit X 8

MOSEL VITELIC
V58C265804S
Complete List of Operation Commands
DDR SDRAM Function Truth Table
CURRENT
STATE¹ CS
Idle
H
L
L
L
L
L
L
L
Row Active
H
L
L
L
L
L
L
Read
H
L
L
L
L
L
L
L
Write
H
L
L
L
L
L
L
L
Read
H
with
L
Auto
L
Precharge
L
L
L
L
L
RAS CAS WE
X
X
X
H
H
H
H
H
L
H
L
X
L
H
H
L
H
L
L
L
H
L
L
L
X
X
X
H
H
X
H
L
H
H
L
L
L
H
H
L
H
L
L
L
X
X
X
X
H
H
H
H
H
L
H
L
H
H
L
L
L
H
H
L
H
L
L
L
X
X
X
X
H
H
H
H
H
L
H
L
H
H
L
L
L
H
H
L
H
L
L
L
X
X
X
X
H
H
H
H
H
L
H
L
H
H
L
L
L
H
H
L
H
L
L
L
X
BS Addr ACTION
X
X
NOP or Power Down
X
X
NOP
BS
X
ILLEGAL²
BS
X
ILLEGAL²
BS
RA Row (&Bank) Active; Latch Row Address
BS
AP NOP⁴
X
X
Auto-Refresh or Self-Refresh⁵
Op- Code Mode reg. Access⁵
X
X
NOP
X
X
NOP
BS CA,AP Begin Read; Latch CA; DetermineAP
BS CA,AP Begin Write; Latch CA; DetermineAP
BS
X
ILLEGAL²
BS
AP Precharge
X
X
ILLEGAL
X
X
NOP (Continue Burst to End;>Row Active)
X
X
NOP (Continue Burst to End;>Row Active)
BS
X
ILLEGAL
BS CA,AP Term Burst, New Read, DetermineAP³
BS CA,AP Term Burst, Start Write, DetermineAP³
BS
X
ILLEGAL to Same Bank, other Bank 0K if tRRD is Satisfied
BS
AP Term Burst, Precharge
X
X
ILLEGAL
X
X
NOP (Continue Burst to End;>Row Active)
X
X
NOP (Continue Burst to End;>Row Active)
BS
X
ILLEGAL
BS CA,AP Term Burst, Start Read, DetermineAP³
BS CA,AP Term Burst, New Write, DetermineAP³
BS
X
ILLEGAL²
BS
AP Term Burst, Precharge³
X
X
ILLEGAL
X
X
NOP (Continue Burst to End;> Precharge)
X
X
NOP (Continue Burst to End;> Precharge)
BS
X
ILLEGAL²
BS
X
ILLEGAL²
X
X
ILLEGAL
BS
X
ILLEGAL²
BS
AP ILLEGAL²
X
X
ILLEGAL
V58C265804S Rev. 1.3 January 2000
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