V62C318256 Datasheet, PDF (1/12 Pages) Mosel Vitelic, Corp – 2.7 VOLT 32K X 8 STATIC RAM

MOSEL VITELIC V62C318256
2.7 VOLT 32K X 8 STATIC RAM
PRELIMINARY
Features
I High-speed: 35, 70 ns
I Ultra low DC operating current of 2mA (max.)
I Low Power Dissipation:
– TTL Standby: 0.5 mA (Max.)
– CMOS Standby: 10 µA (Max.)
I Fully static operation
I All inputs and outputs directly compatible
I Three state outputs
I Ultra low data retention current (V_CC = 2V)
I Extended operating voltage: 2.7V–3.6V
I Packages
– 28-pin TSOP (Standard)
– 28-pin 300 mil SOP (450 mil pin-to-pin)
Description
The V62C318256 is a 262,144-bit static random
access memory organized as 32,768 words by 8
bits. It is built with MOSEL VITELIC’s high
performance CMOS process. Inputs and three-
state outputs are TTL compatible and allow for
direct interfacing with common system bus
structures.
Functional Block Diagram
A₀
V_CC
Row
Decoder
512 x 512
Memory Array
GND
A₈
I/O₀
Column I/O
Input
Data
Circuit
Column Decoder
I/O₇
A₉
A₁₄
CE
OE
WE
Control
Circuit
318256 01
Device Usage Chart
Operating
Temperature
Range
0°C to 70 °C
–40°C to +85°C
Package Outline
T
F
•
•
•
•
Access Time (ns)
35
70
•
•
•
Power
L
LL
•
•
•
Temperature
Mark
Blank
I
V62C318256 Rev. 1.7 July 2001
1