SYS8512FKX-70 Datasheet, PDF (1/7 Pages) MOSAIC – 512K x 8 SRAM MODULE

512K x 8 SRAM MODULE
SYS8512FKX-70/85/10/12
Issue 5.0: November 1999
Description
The SYS8512FKX is plastic 4M Static RAM Module
housed in a standard 32 pin Dual-In-Line package
organised as 512K x 8. The module utilises fast
SRAMs housed in TSOP packages, and uses
double sided surface mount techniques, buried
decoder and dual board construction to achieve a
very high density module.
The module has Chip Select, Write Enable and
Output Enable control inputs; the Output Enable
pin allows faster access times than address access
during a Read Cycle.
Block Diagram
Features
• Access Times of 70/85/100/120 ns.
• Low seated height
• 32 Pin 0.6" Dual-In-Line package with
JEDEC compatible pinout.
• 5 Volt Supply ± 10%.
• Low Power Dissipation:
Average (min cycle)
Standby (CMOS)
605mW (maximum).
44mW (maximum).
• Completely Static Operation.
• Equal Access and Cycle Times.
• All Inputs and Outputs Directly TTL Compatible.
• On-board Supply Decoupling Capacitors.
Pin Definition
AO - A 16
D0 - D7
WE
OE
128K x 8
SRAM
CS
128K x 8
SRAM
CS
128K x 8
SRAM
CS
128K x 8
SRAM
CS
DECODER
A17 CS A18
A18
1
A16
2
A14
3
A12
4
A7
5
A6
6
A5
7
A4
8
A3
9
A2
10
A1
11
A0
12
D0
13
D1
14
D2
15
GND 16
Pin Functions
Address Inputs
Data Input/Output
Chip Select Input
Read/Write Input
Output Enable Input
Power (+5V)
Ground
32
VCC
31
A15
30
A17
29
WE
28
A13
27
A8
26
A9
25
A11
24
OE
23
A10
22
CS
21
D7
20
D6
19
D5
18
D4
17
D3
A0 - A18
D0 - D7
CS
WE
OE
V_CC
GND