URB2403YMD-20W Datasheet, PDF (7/8 Pages) MORNSUN Science& Technology Ltd. – REGULATED SINGLE OUTPUT DIP PACKAGING, DC-DC CONVERTER

PACKAGE DIAGRAM
PCB mounting Series（Without heat sink）
PCB mounting Series（With heat sink）
Special Package Series（A2S/A4S）
TEST CONFIGURATIONS
Input Reflected-Ripple Current Test Setup
Input reflected-ripple current is measured with an inductor Lin and Capacitor Cin to simulate source impedance.
Oscilloscope
Lin
DC DC ^Current
Cin Probe
Load
Lin(4.7µH) Cin(220µF, ESR < 1.0Ω at 100 KHz)
TRIM APPLICATION & TRIM RESISTANCE
Application circuit for TRIM (Part in broken line is the interior of models)
+Vo
+Vo
R1
Vre f ^R3
R2
RT
Trim
R1
R3
Vre f
R2
RT
Tr im
0V
0V
Formula for resistance of TRIM
Trim up
Trim down
aR2
up: RT= _R2-a - R3
Vref
a= _{Vo’-Vref} R1
aR1
do wn : RT= _{R1- a} -R3
Vo ’ - Vr e f
a=
R2
Vr e f
Note: Leave open if not used. Value for R1, R2, R3, and V_ref refer to the above table 1. RT: Resistance of Trim. a: User-defined parameter, no actual
meanings. Vo’: The trim up/down voltage.
(Table 1)
Vo
Param eter
3.3(VDC) 5(VDC) 12(VDC) 15(VDC)
R1(KΩ)
4.841
15
10
15
R2(KΩ)
R3(KΩ)
2.87
15
2.609
3
12.4
15
15
20
Vref(V)
1.24
2.5
2.5
2.5
DESIGN CONSIDERATIONS
① Recommended circuit
All the URB_YMD-20W Series have been tested according to the following recommended testing circuit before leaving factory (see Figure 4)
The product must be tested with load.
If you want to further decrease the input surge voltage and the output ripple, you can increase a capacitance properly or choose capacitors with
low ESR .It should also be noted that the capacitance of filter capacitor must be proper. If the capacitance is too big, a startup problem might arise.
For every channel of output, provided the safe and reliable operation is ensured, the recommended capacitance of its filter capacitor sees (Table 2).
Vi n
Cin
GND
DC DC Cout
(Figure 4)
The copyright and authority for the interpretation of the products are reserved by MORNSUN
+Vo
0V
URB_YMD- 20W
2013.05.21-A/2 Page 7 of 8