PS21313 Datasheet, PDF (9/9 Pages) Mitsubishi Electric Semiconductor – TRANSFER-MOLD TYPE INSULATED TYPE

MITSUBISHI SEMICONDUCTOR <Dual-In-Line Package Intelligent Power Module>
PS21313
TRANSFER-MOLD TYPE
INSULATED TYPE
Fig. 7 TYPICAL DIP-IPM APPLICATION CIRCUIT EXAMPLE
For detailed description of the bootstrap circuit
construction, please contact Mitsubishi Electric
5V line
C1: Tight tolerance temp-compensated electrolytic type; C2,C3: 0.22~2 µ F R-category ceramic capacitor for noise filtering
(Note : The capacitance value depends on the PWM control used in the applied system.)
C2 VUFB
C1 _VUFS
DIP-IPM
P
VP1
C3
UP
VCC
VB
IN
HO
C2
U
COM VS
VVFB
C1 VVFS
C
P
U
U
N
I
T
5V line
VP1
C3
VP
C2
VWF
C1 _VWFS
VP1
C3
WP
VCC
VB
IN
HO
COM VS
VCC
VB
IN
HO
COM VS
C3 VN1
VCC
UOUT
VOUT
V
M
W
15V line
UN
VN
WN
Fo
VNC
UN
VN
WN
Fo
GND
WOUT
VNO
CIN
CFO
CFO
C4(CFO)
A
The long wiring of GND might generate
noise on input signals and cause IGBT
drive malfunction.
If this wiring is too long,
it might cause SC
malfunction.
CIN
B
C5
N
C
R1
Shunt
resistance
If this wiring is too long, the SC level ^N1
fluctuation might be large and cause
SC malfunction.
Note 1 : To prevent the input signals oscillation, an RC coupling at each input is recommended, and the wiring of each input should be as short
as possible. (Less than 2cm)
2 : By virtue of integrating an application specific type HVIC inside the module, direct coupling to CPU terminals without any opto-coupler
or transformer isolation is possible.
3 : FO output is open collector type. This signal line should be pulled up to the positive side of the 5V power supply with approximately
5.1kΩ resistance.
4 : FO output pulse width should be decided by connecting an external capacitor between CFO and VNC terminals (CFO). (Example : CFO
= 22 nF → tFO = 1.8 ms (typ.))
5 : Each input signal line should be pulled up to the positive side of the 5V power supply with approximately 4.7kΩ resistance (other RC
coupling circuits at each input may be needed depending on the PWM control scheme used and on the wiring impedances of the
system’s printed circuit board). Approximately a 0.22~2µF by-pass capacitor should be used across each power supply connection
terminals.
6 : To prevent errors of the protection function, the wiring of A, B, C should be as short as possible.
7 : In the recommended protection circuit, please select the R1C5 time constant in the range of 1.5~2µs.
8 : Each capacitor should be put as nearby the terminals of the DIP-IPM as possible.
9 : To prevent surge destruction, the wiring between the smoothing capacitor and the P&N1 terminals should be as short as possible. Ap-
proximately a 0.1~0.22µF snubber capacitor between the P&N1 terminals is recommended.
Aug. 1999