M37733M4LXXXHP Datasheet, PDF (5/31 Pages) Mitsubishi Electric Semiconductor – SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER

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MITSUBISHI MICROCOMPUTERS
M37733M4LXXXHP
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
BASIC FUNCTION BLOCKS
The M37733M4LXXXHP has the same functions as the
M37733MHBXXXFP except for the memory allocation, the reset
circuit, the ROM area modification function, and the package.
Refer to the section on the M37733MHBXXXFP.
MEMORY
The memory map is shown in Figure 1. The address space has a
capacity of 16 Mbytes and is allocated to addresses from 016 to
FFFFFF16. The address space is divided by 64-Kbyte unit called bank.
The banks are numbered from 016 to FF16.
Built-in ROM, RAM and control registers for internal peripheral devices
are assigned to bank 016.
The 32-Kbyte area from addresses 800016 to FFFF16 is the built-in
ROM. Addresses FFD616 to FFFF16 are the RESET and interrupt
vector addresses and contain the interrupt vectors. Refer to the section
on interrupts for details.
The 2048-byte area allocated to addresses from 8016 to 87F16 is the
built-in RAM. In addition to storing data, the RAM is used as stack
during a subroutine call or interrupts.
Peripheral devices such as I/O ports, A-D converter, serial I/O, timer,
and interrupt control registers are allocated to addresses from 016 to
7F16.
Additionally, the internal ROM area can be modified by software. Refer
to the section on ROM area modification function for details.
A 256-byte direct page area can be allocated anywhere in bank 016
by using the direct page register (DPR). In the direct page addressing
mode, the memory in the direct page area can be accessed with two
words. Hence program steps can be reduced.
Bank 016
00000016
00FFFF16
01000016
00000016
00007F16
00008016
00087F16
Internal RAM
2048 bytes
00000016
Internal peripheral
devices
control registers
refer to Fig. 2 for
detail information
00007F16
Bank 116
01FFFF16
Bank FE16
FE000016
Bank FF16
FEFFFF16
FF000016
FFFFFF16
00800016
Internal ROM
32 Kbytes
00FFD616
00FFFF16
Interrupt vector table
00FFD616 _{A-D/UART2 trans./rece.}
UART1 transmission
UART1 receive
UART0 transmission
UART0 receive
Timer B2
Timer B1
Timer B0
Timer A4
Timer A3
Timer A2
Timer A1
Timer A0
INT2/Key input
INT1
INT0
Watchdog timer
DBC
BRK instruction
00FFFE16
Zero divide
RESET
Note. Internal ROM area can be modified. (Refer to the section on ROM area modification function.)
Fig. 1 Memory map
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