M66290AGP Datasheet, PDF (48/53 Pages) Mitsubishi Electric Semiconductor – USB DEVICE CONTROLLER

MITSUBISHI <DIGITAL ASSP>
M66290AGP/FP
USB DEVICE CONTROLLER
(4) DMA Transfer Timing -2
In case of one word transfer mode (DMA operation mode register : MODE=1)
(4-1) Write timing -1
twh(Dreq)
Dreq (note 7)
Dack
WR (note 5)
td(Dack-Dreq)
td(Dackh-Dreq)
tw(CTRL)
td(CTRL-Dack)
trec(CTRL)
tsu(D)
th(D)
D15 to 0
Data input is established
(4-2) Read timing -1
Dreq (note 7)
Dack
RD (note 6)
D15 to 0
td(Dack-Dreq)
twh(Dreq)
td(Dackh-Dreq)
ta(CTRL)
tw(CTRL)
td(CTRL-Dack)
trec(CTRL)
ten(CTRL)
tv(CTRL)
tdis(CTRL)
Data output is established
note 7 : Inactive condition of Dreq is Dack="L"
And when next DMA transfer exists, spec when Dreq turns to active is valid the latest one of twh(Dreq) or td(Dackh-Dreq).
note 5 : Write is done in the overlap period when Dack and WR is active "L".
Spec from the positive edge is valid from the fastest inactive signal.
Spec of pulse width is valid of the overlap period of active "L".
note 6 : Read is done in the overlap period of Dack and RD is active "L"
Spec from the negative edge is valid from the latest signal.
Spec from the positive edge is valid form the fastest inactive signal.
Spec of pulse width is valid during active "L" overlap period.
48