M37630M4T Datasheet, PDF (40/48 Pages) Mitsubishi Electric Semiconductor – SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER

CLOCK GENERATING CIRCUIT
The 7630 group is equipped with an internal clock generating cir-
cuit.
Please refer to Fig. 46 for a circuit example using a ceramic resona-
tor or quartz crystal oscillator. For the capacitor values, refer to the
manufacturers recommended parameters which depend on each
oscillators characteristics. When using an external clock, input it to
the X_IN pin and leave X_OUT open.
MITSUBISHI MICROCOMPUTERS
7630 Group
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
X_IN
C_IN
X_OUT
C_OUT
Oscillation Control
The 7630 group has two low power modes: the stop and the wait
mode.
Stop mode
The microcomputer enters the stop mode by executing the STP
instruction. The oscillator stops with the internal clock φ at “H” level.
Timers 1 and 2 will be cascaded and initialized by their reload
latches contents. The count source for timer 1 will be set to
f(X_IN)/16.
Oscillation is restarted if an external interrupt is accepted or at
reset. When using an external interrupt, the internal clock φ remains
at “H” level until timer 2 underflows allowing a time-out until the
Fig. 46
Ceramic resonator circuit
.
clock oscillation becomes stable. When using reset, a fixed time-out
will be generated allowing oscillation to stabilize.
Wait mode
The microcomputer enters the wait mode by executing the WIT
instruction. The internal clock ø stops at “H” level while the oscillator
keeps running.
Recovery from wait mode can be done in the same way as from
stop mode. However, the time-out period mentioned above is not
required to return from wait-mode, thus no such time-out mecha-
nism has been implemented.
Note: Set the interrupt enable bit of the interrupt source to be used
to return from stop or wait mode to “1” before executing STP or WIT
instruction.
X_OUT
X_IN
interrupt request
interrupt disable flag
RESET
STP
delay
SQ
R
1/4
“1”
“0”
1/2
CPUM₆
RQ
DQ
STP S
T
internal clock
φ _for
peripherals
2
oscillator countdown
(timer 1 and 2)
RQ
STP S
RQ
WIT S
DQ
T
P2
φ
internal clock
for CPU
Fig. 47 Block diagram of clock generating circuit
40
MITSUBISHI
ELECTRIC