M37630M4T Datasheet, PDF (17/48 Pages) Mitsubishi Electric Semiconductor – SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER

MITSUBISHI MICROCOMPUTERS
7630 Group
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
Interrupt request register A
7
0
(address 0002₁₆)
7
IREQA
Not used
(returns to ”0” when read)
External interrupt INT₀ request bit
External interrupt INT₁ request bit
CAN successful transmission
interrupt request bit
CAN successful receive
interrupt request bit
CAN overrun interrupt request bit
CAN error passive
interrupt request bit
CAN bus off interrupt request bit
7
0 _{Interrupt request register B}
7
(address 000316)
IREQB
CAN wake up
interrupt request bit
Timer X interrupt request bit
Timer Y interrupt request bit
Timer 1 interrupt request bit
Timer 2 interrupt request bit
Timer 3 interrupt request bit
CNTR₀ interrupt request bit
CNTR₁ interrupt request bit
7
0 ^{Interrupt request register C}
7
(address 000416)
IREQC
UART receive complete
(receive buffer full)
interrupt request bit
UART transmit complete
(transmit register empty)
interrupt request bit
UART transmit buffer empty
interrupt request bit
UART receive error interrupt
request bit
Serial I/O interrupt request bit
AD conversion complete
interrupt request bit
Key-on wake-up interrupt request bit
Not used (returns to ”0” when read)
0 : No interrupt request
1 : Interrupt requested
0 ^{Interrupt control register A}
(address 000516)
ICONA
Not used (returns to ”0” when read)
External interrupt INT₀ enable bit
External interrupt INT₁ enable bit
CAN successful transmission
interrupt enable bit
CAN successful receive
interrupt enable bit
CAN overrun interrupt enable bit
CAN error passive
interrupt enable bit
CAN bus off interrupt enable bit
0 ^{Interrupt control register B}
(address 000616)
ICONB
CAN wake–up interrupt enable bit
Timer X interrupt enable bit
Timer Y interrupt enable bit
Timer 1 interrupt enable bit
Timer 2 interrupt enable bit
Timer 3 interrupt enable bit
CNTR₀ interrupt enable bit
CNTR₁ interrupt enable bit
0 _{Interrupt control register C}
(address 000716)
ICONC
UART receive complete
(receive buffer full)
interrupt enable bit
UART transmit complete
(transmit register empty)
interrupt enable bit
UART transmit buffer empty
interrupt enable bit
UART receive error interrupt
enable bit
Serial I/O interrupt enable bit
AD conversion complete
interrupt enable bit
Key-on wake-up interrupt enable bit
Not used (returns to ”0” when read)
0: Interrupt disabled
1: Interrupt enabled
Fig. 15 Structure of interrupt request and control registers A, B and C
MITSUBISHI
ELECTRIC
17