M37736EHBXXXGP Datasheet, PDF(4/33 Page) Mitsubishi Electric Semiconductor – PROM VERSION OF M37736MHBXXXGP(MICROCOMPUTERS)

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M37736EHBXXXGP Datasheet, PDF (4/33 Pages) Mitsubishi Electric Semiconductor – PROM VERSION OF M37736MHBXXXGP(MICROCOMPUTERS)

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MITSUBISHI MICROCOMPUTERS

M37736EHBXXXGP

M37736EHBGS

PROM VERSION OF M37736MHBXXXGP

PIN DESCRIPTION

Pin

Name Input/Output

Vcc,

Power source

Vss

CNVss CNVss input

Input

_____

RESET

XIN

Reset input

Clock input

Input

Input

XOUT

_

E

Clock output Output

Enable output Output

BYTE

BSEL

External data

bus width

selection input

Bus method

select input

AVcc,

AVss

VREF

P00 â P07

Analog power

source input

Reference

voltage input

I/O port P0

Input

Input

Input

I/O

P10 â P17 I/O port P1

I/O

P20 â P27 I/O port P2

I/O

P30 â P33 I/O port P3

I/O

P40 â P47 I/O port P4

I/O

P50 â P57 I/O port P5

I/O

P60 â P67 I/O port P6

I/O

P70 â P77 I/O port P7

I/O

P80 â P87 I/O port P8

P90 â P97 Output port P9

P100 â P107 I/O port P10

EVL0, EVL1

ââ

I/O

Output

I/O

Output

Functions

Apply 5 V Â± 10% to Vcc and 0 V to Vss.

This pin controls the processor mode. Connect to Vss for the single-chip mode and the memory

expansion mode, and to Vcc for the microprocessor mode.

When âLâ level is applied to this pin, the microcomputer enters the reset state.

These are pins of main-clock generating circuit. Connect a ceramic resonator or a quartz-

crystal oscillator between XIN and XOUT. When an external clock is used, the clock source should

be connected to the XIN pin, and the XOUT pin should be left open.

This pin functions as the enable signal output pin which indicates the access status in the internal

bus. In the external bu_s__ mode B and the memory expansion mode or the microprocessor mode,

this pin output signal RDE.

In the memory expansion mode or the microprocessor mode, this pin determines whether the

external data bus has an 8-bit width or a 16-bit width. The data bus has a 16-bit width when âLâ

signal is input and an 8-bit width when âHâ signal is input.

In the memory expansion mode or the microprocessor mode, this pin determines the external bus

mode. The bus mode becomes the external bus mode A when âHâ signal is input, and the external

bus mode B when âLâ signal is input.

Power source input pin for the A-D converter. Externally connect AVcc to Vcc and AVss to Vss.

This is reference voltage input pin for the A-D converter.

In the single-chip mode, port P0 becomes an 8-bit I/O port. An I/O direction register is available so

that each pin can be programmed for input or output. These ports are in the input mode when

reset.

In

the

memory

expansion

mode

or

the

microprocessor

mode, these pins

___ ___

o_u_t_ pu_t

address

(A0

â

A7)

at the external bus mode A, and these pins output signals CS0 â CS4 and RSMP, and addresses

(A16, A17) at the external bus mode B.

In the single-chip mode, these pins have the same functions as port P0. When the BYTE pin is set

to âLâ in the memory expansion mode or the microprocessor mode and external data bus has a

16-bit width, high-order data (D8 â D15) is input/output or an address (A8 â A15) is output. When

the BYTE pin is âHâ and an external data bus has an 8-bit width, only address (A8 â A15) is output.

In the single-chip mode, these pins have the same functions as port P0. In the memory expansion

mode or the microprocessor mode, low-order data (D0 â D7) is input/output or an address is

output. When using the external bus mode A, the address is A16 â A23. When using the external

bus mode B, the address is A0 â A7.

In the single-chip mode, these pins ha_v_e _th_e_same functi_o_ n_a_s port P0. In the memory expansion

mode or the micro_p_ro_ce_s_ so_r mode, R/W_,_B_H_E, ALE, and HLDA signals are output at the external

bus mode A, and WEL, WEH, ALE, and HLDA signals are output at the external bus mode B.

In the single-chip mode, these pins have the same functions as__ po_r_t P0. I_ n_th_e memory expansion

mode or the microprocessor mode, P40, P41 and P42 become HOLD and RDY input pins, and a

clock Ï1 output pin, respectively. Functions of the other pins are the same as in the single-chip

mode. However, in the memory expansion mode, P42 can be selected as an I/O port.

In addition to having the same functions as port P0 in the single-chip mode, these pins also

function as I/O pins for timers A0 to A3.

In addition to having the same functions as port P0 in the single-chip m_o_d_e, th_e_s_e pins also

function as I/O pins for timer A4, input pins for external interrupt input (INT0 â INT2) and input pins

for timers B0 to B2. P67 also functions as sub-clock ÏSUB output pin.

In addition to having the same functions as port P0 in the single-chip mode, these pins function as

input pins for A-D converter. Additionally, P76 and P77 have the function as the output pin (XCOUT)

and the input pin (XCIN) of the sub-clock (32 kHz) oscillation circuit, respectively. When P76 and

P77 are used as the XCOUT and XCIN pins, connect a resonator or an oscillator between the both.

In addition to having the same functions as port P0 in the single-chip mode, these pins also

function as I/O pins for UART 0 and UART 1.

Port P9 is an 8-bit I/O port. These ports are floating when reset. When writting to the port latch,

these ports become the output mode. P90 â P93 also function as I/O port for UART 2.

In addition to having the same functions as port P0__ in th_e_single-chip mode, P104 â P107 also

function as input pins for key input interrupt input (KI0 â KI3).

These pins should be left open.

4

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