MH4S64BLG-7 Datasheet, PDF (38/55 Pages) Mitsubishi Electric Semiconductor – 268435456-BIT (4194304 - WORD BY 64-BIT)SynchronousDRAM

Preliminary Spec.
Some contents are subject to change without notice.
MITSUBISHI LSIs
MH4S64BLG -7,-8,-10
268435456-BIT (4194304 - WORD BY 64-BIT)SynchronousDRAM
Burst Read (multiple bank) with Auto-Precharge @BL=4 CL=3
CLK
/CS
/RAS
/CAS
/WE
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17
tRC
tRRD
tRRD
tRCD
BL+tRP
tRCD
BL+tRP
tRCD
CKE
DQM
DQM read latency =2
A0-8
X
XY
Y
X
YX
Y
A10
X
X
A9,11 ^X
X
X
X
X
X
BA0,1
DQ
0
10
1
0
01
1
CL=3
CL=3
CL=3
Q0 Q0 Q0 Q0 Q1 Q1 Q1 Q1
Q0 Q0
ACT#0
READ#0 with
ACT#1 ^{Auto-Precharge}
ACT#0
READ#1 with
Auto-Precharge
READ#0
ACT#1
Italic parameter indicates minimum case
MIT-DS-0227-0.5
MITSUBISHI
ELECTRIC
( 38 / 55 )
29.Oct.1998