MH4S64BLG-7 Datasheet, PDF (35/55 Pages) Mitsubishi Electric Semiconductor – 268435456-BIT (4194304 - WORD BY 64-BIT)SynchronousDRAM

Preliminary Spec.
Some contents are subject to change without notice.
MITSUBISHI LSIs
MH4S64BLG -7,-8,-10
268435456-BIT (4194304 - WORD BY 64-BIT)SynchronousDRAM
Burst Read (single bank) @BL=4 CL=3
CLK
/CS
/RAS
/CAS
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17
tRC
tRAS
tRCD
tRP
tRCD
/WE
CKE
DQM
DQM read latency =2
A0-8
X
Y
X
Y
A10
X
X
A9,11
X
X
BA0,1
0
DQ
ACT#0
0
CL=3
0
0
Q0 Q0 Q0 Q0
READ#0
PRE#0
ACT#0
READ to PRE ≥BL allows full data out
0
Q0 Q0
READ#0
Italic parameter indicates minimum case
MIT-DS-0227-0.5
MITSUBISHI
ELECTRIC
( 35 / 55 )
29.Oct.1998