MH32S72DBFA-7 Datasheet, PDF (36/56 Pages) Mitsubishi Electric Semiconductor – 2,415,919,104-BIT ( 33,554,432-WORD BY 72-BIT ) Synchronous DYNAMIC RAM

Preliminary Spec.
Some contents are subject to change without notice.
MITSUBISHI LSIs
MH32S72DBFA -7,-8
2,415,919,104-BIT ( 33,554,432-WORD BY 72-BIT ) Synchronous DYNAMIC RAM
CLK
Write Interrupted by Write / Read
BL=4,Latch mode(REGE="H")
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17
/CS
/RAS
/CAS
tRRD
tRCD
tCCD
/WE
CKE
DQM
A0-9
X
XY
A10
X
X
A11
X
X
YY
Y
Y
BA0,1
0
10
00
1
0
REGE
DQ
CL=3
D0 D0 D0 D0 D0 D0 D1 D1
Q0 Q0 Q0 Q0
ACT#0 WRITE#0 WRITE#0 WRITE#0
READ#0
ACT#1
WRITE#1
Burst Write can be interrupted by Write or Read of any active bank.
Italic parameter indicates minimum case
MIT-DS-348-0.0
MITSUBISHI
ELECTRIC
29/Sep. /1999 ₃₆