M2V28S20ATP Datasheet, PDF (33/51 Pages) Mitsubishi Electric Semiconductor – 128M Synchronous DRAM

SDRAM (Rev. 1.0E)
Nov. '99
MITSUBISHI LSIs
128M Synchronous DRAM
M2V28S20ATP -6,-6L,-7,-7L,-8,-8L ^{(4-BANK x 8,388,608-WORD x 4-BIT)}
M2V28S30ATP -6,-6L,-7,-7L,-8,-8L ^{(4-BANK x 4,194,304-WORD x 8-BIT)}
M2V28S40ATP -6,-6L,-7,-7L,-8,-8L (4-BANK x 2,097,152-WORD x 16-BIT)
Burst Write (multi bank) @BL=4
CLK
/CS
/RAS
/CAS
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17
tRRD
tRCD
tRC
tRAS
tRRD
tRP
tRCD
/WE
CKE
tWR
tWR
DQM
A0-8
X
XY
Y
X
XY
A10
X
X
X
X
A9,11
X
X
X
X
BA0,1
0
10
10
01 2 0
DQ
D0 D0 D0 D0 D1 D1 D1 D1
D0 D0 D0 D0
ACT#0
WRITE#0
ACT#1
PRE#0
WRITE#1
ACT#0 ACT#2 WRITE#0
PRE#1
Italic parameter indicates minimum case
MITSUBISHI ELECTRIC
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