PSS10S92F6-AG Datasheet, PDF (3/12 Pages) Mitsubishi Electric Semiconductor – Dual-In-Line Package Intelligent Power Module

< Dual-In-Line Package Intelligent Power Module >
PSS10S92F6-AG, PSS10S92E6-AG
TRANSFER MOLDING TYPE
INSULATED TYPE
ELECTRICAL CHARACTERISTICS (Tj = 25°C, unless otherwise noted)
INVERTER PART
Symbol
Parameter
Condition
Limits
Unit
Min. Typ. Max.
VCE(sat)
Collector-emitter saturation
voltage
VD=VDB = 15V, VIN= 5V
IC= 10A, Tj= 25°C
IC= 10A, Tj= 125°C
IC=1.0A, Tj= 25°C
-
1.70 2.05
-
1.90 2.25
V
-
0.90 1.10
VEC
FWDi forward voltage
VIN= 0V, -IC= 10A
-
2.50 3.00
V
ton
0.65 1.05 1.45 μs
tC(on)
toff
tC(off)
Switching times
VCC= 300V, VD= VDB= 15V
IC= 10A, Tj= 125°C, VIN= 0↔5V
Inductive Load (upper-lower arm)
-
0.40 0.65 μs
-
1.15 1.60 μs
-
0.15 0.30 μs
trr
-
0.30
-
μs
ICES
Collector-emitter cut-off
current
VCE=VCES
Tj= 25°C
Tj= 125°C
-
-
1
mA
-
-
10
CONTROL (PROTECTION) PART
Symbol
Parameter
Condition
Limits
Unit
Min. Typ. Max.
ID
Circuit current
IDB
Total of VP1-VNC, VN1-VNC
Each part of VUFB-U,
VVFB-V, VWFB-W
VD=15V, VIN=0V
VD=15V, VIN=5V
VD=VDB=15V, VIN=0V
VD=VDB=15V, VIN=5V
-
-
2.80
-
-
2.80
mA
-
-
0.10
-
-
0.10
VSC(ref)
Short circuit trip level
VD = 15V
(Note 3) 0.455 0.480 0.505 V
UVDBt
UVDBr
UVDt
UVDr
P-side Control supply
under-voltage protection(UV)
N-side Control supply
under-voltage protection(UV)
Tj ≤125°C
Trip level
Reset level
Trip level
Reset level
7.0
10.0 12.0
V
7.0
10.0 12.0
V
10.3
-
12.5
V
10.8
-
13.0
V
VOT
Temperature Output
(PSS**S92F6-AG)
Pull down R=5kΩ (Note 4)
LVIC Temperature=90°C
LVIC Temperature=25°C
2.63 2.77 2.91
V
0.88 1.13 1.39
V
OTt
OTrh
Over temperature protection
(OT, PSS**S92E6-AG) (Note5)
VD = 15V
Detect LVIC temperature
Trip level
Hysteresis of trip-reset
100
120
140
°C
-
10
-
°C
VFOH
VFOL
Fault output voltage
VSC = 0V, FO terminal pulled up to 5V by 10kΩ
VSC = 1V, IFO = 1mA
4.9
-
-
V
-
-
0.95
V
tFO
Fault output pulse width
(Note 6)
20
-
-
μs
IIN
Input current
VIN = 5V
0.70 1.00 1.50 mA
Vth(on)
Vth(off)
Vth(hys)
ON threshold voltage
OFF threshold voltage
ON/OFF threshold
hysteresis voltage
Applied between UP, VP, WP, UN, VN, WN-VNC
-
2.10 2.60
0.80 1.30
-
V
0.35 0.65
-
VF
Bootstrap Di forward voltage IF=10mA including voltage drop by limiting resistor (Note 7) 1.1
1.7
2.3
V
R
Built-in limiting resistance Included in bootstrap Di
80
100
120
Ω
Note 3 : SC protection works only for N-side IGBT. Please select the external shunt resistance such that the SC trip-level is less than 1.7 times of the current rating.
Note 4 : DIPIPM don't shutdown IGBTs and output fault signal automatically when temperature rises excessively. When temperature exceeds the protective level that
user defined, controller (MCU) should stop the DIPIPM. Temperature of LVIC vs. VOT output characteristics is described in Fig. 3.
5 : When the LVIC temperature exceeds OT trip temperature level(OTt), OT protection works and Fo outputs. In that case if the heat sink dropped off or fixed
loosely, don't reuse that DIPIPM. (There is a possibility that junction temperature of power chips exceeded maximum Tj(150°C).
6 : Fault signal Fo outputs when SC, UV or OT protection works. Fo pulse width is different for each protection modes. At SC failure, Fo pulse width is a fixed
width (=minimum 20μs), but at UV or OT failure, Fo outputs continuously until recovering from UV or OT state. (But minimum Fo pulse width is 20μs.)
7 : The characteristics of bootstrap Di is described in Fig.2.
Fig. 2 Characteristics of bootstrap Di VF-IF curve (@Ta=25°C) including voltage drop by limiting resistor (Right chart is enlarged chart.)
160
140
120
100
80
60
40
20
0
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
V_F [V]
30
25
20
15
10
5
0
0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5
V_F [V]
Publication Date : October 2013
3