M5M5V5636GP16 Datasheet, PDF (3/17 Pages) Mitsubishi Electric Semiconductor – 18874368-BIT(524288-WORD BY 36-BIT) NETWORK SRAM

BLOCK DIAGRAM
MITSUBISHI LSIs
M5M5V5636GP –16
18874368-BIT(524288-WORD BY 36-BIT) NETWORK SRAM
VDD
VDDQ
A0
19
A1
A2~18
LBO#
CLK
CKE#
ZZ
ADV
BWa#
BWb#
BWc#
BWd#
W#
G#
E1#
E2
E3#
ADDRESS
REGISTER
19
17
A1
D1
A0
D0
LINEAR/
INTERLEAVED
BURST
COUNTER
A1'
Q1
A0'
Q0
WRITE ADDRESS
REGISTER1
19
WRITE ADDRESS
REGISTER2
19
WRITE REGISTRY
AND
DATA COHERENCY
CONTROL LOGIC
READ
LOGIC
BYTE1
WRITE
DRIVERS
BYTE2
WRITE
DRIVERS
BYTE3
WRITE
DRIVERS
BYTE4
WRITE
DRIVERS
36
256Kx36
MEMORY
ARRAY
INPUT
REGISTER1
INPUT
REGISTER0
DQa
DQPa
DQb
DQPb
DQc
DQPc
DQd
DQPd
VSS
Note2. The BLOCK DIAGRAM does not include the Boundary Scan logic. See Boundary Scan chapter.
Note3. The BLOCK DIAGRAM illustrates simplified device operation. See TRUTH TABLE, PIN FUNCTION
and timing diagrams for detailed information.
3
MITSUBISHI
Advanced Information
ELECTRIC
M5M5V5636GP REV.0.1