MH32S64APFB-7 Datasheet, PDF (28/55 Pages) Mitsubishi Electric Semiconductor – 2147483648-BIT (33554432 - WORD BY 64-BIT)SynchronousDRAM

Preliminary Spec.
Some contents are subject to change without notice.
MITSUBISHI LSIs
MH32S64APFB -7,-8
2147483648-BIT (33554432 - WORD BY 64-BIT)SynchronousDRAM
SELF REFRESH
Self-refresh mode is entered by issuing a REFS command (/CS=/RAS=/CAS=L,
/WE=H, CKE=L). Once the self-refresh is initiated, it is maintained as log as CKE is
kept low.During the self-refresh mode, CKE is asynchronous and the only enabled
input , all other inputs including CK are disabled and ignored, so that power
consumption due to synchronous inputs is saved. To exit the self-refresh, supplying
stable CK inputs, asserting DESEL or NOP command and then asserting CKE=H.
After tRFC from the 1st CK edge follwing CKE=H, all banks are in the idle state and
a new command can be issued after, but DESEL or NOP commands must be
asserted till then.
Self-Refresh
CK
/S
/RAS
Stable CK
NOP
/CAS
/WE
CKE
A0-11
new command
X
BA0,1
00
Self Refresh Entry
Self Refresh Exit
minimum tRFC
for recovery
MIT-DS-0358-0.2
MITSUBISHI
ELECTRIC
( 28/ 55 )
16.Mar.2000