M2V64S20DTP-6 Datasheet, PDF (25/51 Pages) Mitsubishi Electric Semiconductor – 64M Synchronous DRAM

MITSUBISHI LSIs
SDRAM (Rev.3.2)
Feb.'00
M2V64S20DTP-6,-6L,-7,-7L,-8,-8L ^{(4-BANK x 4,194,304-WORD x 4-BIT)}
M2V64S30DTP-6,-6L,-7,-7L,-8,-8L ^{(4-BANK x 2,097,152-WORD x 8-BIT)}
M2V64S40DTP-6,-6L,-7,-7L,-8,-8L ^{(4-BANK x 1,048,576-WORD x 16-BIT)}
64M Synchronous DRAM
[ Write with Auto-Precharge Interrupted by Write or Read to another Bank ]
Burst write with auto-precharge can be interrupted by write or read to another bank. Next ACT
comand can be issued after (BL+tWR-1+tRP) from the WRITEA. Auto-precharge interruption by a
command to the same bank is inhibited.
WRITEA interrupted by WRITE to another bank (BL=4)
CLK
Command
Write
Write
BL
A0-9,11
Ya
Yb
tWR
A10
1
0
ACT
tRP
Xa
Xa
BA0-1
00
10
00
DQ
Da0 Da1 Db0 Db1 Db2 Db3
auto-precharge interrupted
activate
WRITEA interrupted by READ to another bank (CL=2, BL=4)
CLK
Command
A0-9,11
A10
Write
Ya
1
Read
BL
Yb
tWR
0
ACT
tRP
Xa
Xa
BA0-1
00
10
00
DQ
Da0 Da1
Qb0 Qb1 Qb2 Qb3
auto-precharge interrupted
activate
MITSUBISHI ELECTRIC
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