MH8S72BAFD-7 Datasheet, PDF (20/56 Pages) Mitsubishi Electric Semiconductor – 603,979,776-BIT ( 8,388,608-WORD BY 72-BIT ) Synchronous DYNAMIC RAM

MH8S72BAFD -7, -8 ^{MITSUBISHI LSIs}
P ^{rSepl iemci.n a r y} _{603,979,776-BIT ( 8,388,608-WORD BY 72-BIT ) Synchronous DYNAMIC RAM}
BUFFER MODE
Symbol Parameter
tAC Access time from CK
tOH
tOLZ
tOHZ
Output Hold time
from CK
Delay time, output low
impedance from CK
Delay time, output high
impedance from CK
CL=2
CL=3
Limits
-7
-8
Unit
Min. Max. Min. Max.
6
7
ns
6
6
3
3
ns
0
0
ns
3
6
3
6 ns
Output Load Condition
VTT=1.4V
50Ω
VOUT
50pF
CK
DQ
Output Timing Measurement
Reference Point
1.4V
1.4V
CK
DQ
tAC
tOH
tOHZ
1.4V
1.4V
MIT-DS-0273-0.2
MITSUBISHI
ELECTRIC
1/ Dec./1998 ₂₀