M2V56S20TP Datasheet, PDF (20/49 Pages) Mitsubishi Electric Semiconductor – 256M Synchronous DRAM

SDRAM (Rev.1.1)
Single Data Rate
Feb.2000
MITSUBISHI LSIs
M2V56S20/ 30/ 40/ TP -6, -7, -8
256M Synchronous DRAM
[ Read Interrupted by Burst Terminate ]
Similarly to the precharge, a burst terminate command can interrupt the burst read operation and
disable the data output. The terminated bank remains active. READ to TBST interval is minimum 1
CLK. A TBST command to output disable latency is equivalent to the /CAS Latency.
Read interrupted by Terminate (BL=4)
CLK
Command
READ
TBST
CL=2
DQ
Command
DQ
Command
READ
Q0 Q1 Q2
TBST
Q0 Q1
READ TBST
DQ
Q0
CL=3
Command
DQ
Command
DQ
Command
DQ
READ
TBST
READ
Q0 Q1 Q2
TBST
READ TBST
Q0 Q1
Q0
MITSUBISHI ELECTRIC
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