M37702M2L Datasheet, PDF (13/20 Pages) Mitsubishi Electric Semiconductor – SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER

MITSUBISHI MICROCOMPUTERS
M37702M2LXXXGP, M37702S1LGP
M37702M2LXXXHP, M37702S1LHP
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
SWITCHING CHARACTERISTICS (VCC = 2.7 to 5.5 V, VSS = 0 V, Ta = 25 °C, f(XIN) = 8 MHz, unless otherwise noted)
Single-chip mode
Symbol
Parameter
Test conditions
Limits
Unit
Min. Max.
td(E–P0Q)
td(E–P1Q)
td(E–P2Q)
td(E–P3Q)
td(E–P4Q)
td(E–P5Q)
td(E–P6Q)
td(E–P7Q)
td(E–P8Q)
Port P0 data output delay time
Port P1 data output delay time
Port P2 data output delay time
Port P3 data output delay time
Port P4 data output delay time
Port P5 data output delay time
Port P6 data output delay time
Port P7 data output delay time
Port P8 data output delay time
Fig. 4
300 ns
300 ns
300 ns
300 ns
300 ns
300 ns
300 ns
300 ns
300 ns
Memory expansion mode and microprocessor mode (when wait bit = “0”, and external memory area is accessed)
Symbol
Parameter
Test conditions
Limits
Unit
Min. Max.
td(P0A–E) Port P0 address output delay time
50
ns
td(E–P1Q) Port P1 data output delay time (BYTE = “L”)
130 ns
tPXZ(E–P1Z) Port P1 floating start delay time (BYTE = “L”)
10 ns
td(P1A–E) Port P1 address output delay time
50
ns
td(P1A–ALE) Port P1 address output delay time
40
ns
td(E–P2Q) Port P2 data output delay time
130 ns
tPXZ(E–P2Z) Port P2 floating start delay time
10 ns
td(P2A–E) Port P2 address output delay time
50
ns
td(P2A–ALE) Port P2 address output delay time
_____
td(φ1–HLDA) HLDA output delay time
40
ns
120 ns
td(ALE–E)
ALE output delay time
4
ns
tW(ALE)
td(BHE–E)
td(R/W–E)
ALE pulse width
____
BHE output delay time
__
R/W output delay time
Fig. 4
60
ns
50
ns
50
ns
td(E–φ1)
φ1 output delay time
0
40 ns
th(E–P0A) Port P0 address hold time
50
ns
th(ALE–P1A) Port P1 address hold time (BYTE = “L”)
9
ns
th(E–P1Q) Port P1 data hold time (BYTE = “L”)
50
ns
tPZX(E–P1Z) Port P1 floating release delay time (BYTE = “L”)
95
ns
th(E–P1A) Port P1 address hold time (BYTE = “H”)
50
ns
th(ALE–P2A) Port P2 address hold time
9
ns
th(E–P2Q) Port P2 data hold time
50
ns
tPZX(E–P2Z)
th(E–BHE)
th(E–R/W)
tW(EL)
Port P2 floating release delay time
____
BHE hold time
__
R/W hold time
_
E pulse width
95
ns
18
ns
18
ns
460
ns
13