M37640E8 Datasheet, PDF (112/172 Pages) Mitsubishi Electric Semiconductor – SINGLE-CHIP 8-BIT CMOS MICROCONTROLLER

7600 Series
M37640E8-XXXF Preliminary Specification
Mitsubishi Microcomputers
MSB
7
RTS3
Bits 0-3
RTS3:0
RTS2
RTS1
RTS0
Reserved
Reserved
Reserved
Reserved ^LSB
0
Reserved (Read/Write “0”)
RTS Assertion Delay Count 3:0 (bits 7,6,5,4)
0000:
No delay, RTS asserts immediately after receive operation completes.
0001:
RTS asserts 8 bit-times after receive operation completes.
0010:
RTS asserts 16 bit-times after receive operation completes.
0011:
RTS asserts 24 bit-times after receive operation completes.
.
.
.
1000:
RTS asserts 64 bit-times after receive operation completes.
.
.
.
1110:
RTS asserts 112 bit-times after receive operation completes.
1111:
RTS asserts 120 bit-times after receive operation completes.
Address: 0036₁₆, 003E₁₆
Access: R/W
Reset: 80₁₆
Figure 2-114. UxRTSC Register
CTS (input)
TXD (output)
start
DATA
RXD (input) DATA
stop _{programmable delay}
start
DATA
RTS (output)
In both examples, the Transmit and Receive have already been enabled
Figure 2-115. CTSx and RTSx Timing Examples
2.14.9 UART Address Mode
The UART address mode is intended for use in a multi-receiver environment where an address is sent
before each message to designate which UART or UARTs are to wake-up and receive the message. An
address is identified by the MSB of the incoming data byte being a “1”. The bit is “0” for
non-address data. UART address mode can be used in either 8-bit or 9-bit character length mode. The
character length is chosen by writing the appropriate values to the UART Character Length Selection
Bits (LE1,0).
UART address mode is enabled by setting the UART Address Mode Enable Bit (AME) to “1”. When
UART address mode is enabled, the MSB of a newly received byte of data (that is either 8 or 9 bits
in length) is examined if a valid stop bit is detected and a parity error has not occurred (if parity is
enabled). If the MSB is “1”, then the receive buffer full interrupt and flag are set and AME is
automatically cleared, disabling UART address mode. If the MSB is “0”, then the receive buffer full
interrupt is not set. However, the RBF flag is still set for this case. If a valid stop bit is not detected
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UART