M32000D4BFP-80 Datasheet, PDF (11/44 Pages) Mitsubishi Electric Semiconductor – SINGLE-CHIP 32-BIT CMOS MICROCOMPUTER

MITSUBISHI MICROCOMPUTERS
M32000D4BFP-80
SINGLE-CHIP 32-BIT CMOS MICROCOMPUTER
Condition bit register
The condition bit register (CBR) is a separate read-only register which
contains a copy of the current value of the condition bit (C) in the
PSW. An attempt to write to the CBR with the MVTC instruction is
ignored.
Interrupt stack pointer, User stack pointer
The interrupt stack pointer (SPI) and the user stack pointer (SPU)
retain the current stack address. The SPI and SPU can be accessed
as the general-purpose register R15. R15 switches between repre-
senting the SPI and SPU depending on the value of the stack mode
bit (SM) in the PSW.
Backup PC
The backup PC (BPC) is the register where a copy of the PC value is
saved when EIT occurs. Bit 31 is fixed at "0". When EIT occurs, the
PC value immediately before EIT occurrence or that of the next in-
struction is set. The value of the BPC is reloaded to the PC when the
RTE instruction is executed. However, the values of the lower 2 bits
of the PC become "00" on returning (It always returns to the word
boundary).
0
31
CBR 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 C
0
SPI
31
SPI
0
SPU
31
SPU
0
31
BPC
BPC
0
Fig. 4 Condition bit register, interrupt stack pointer, user stack pointer and backup PC
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