MH4V644AWXJ-5 Datasheet, PDF (1/20 Pages) Mitsubishi Electric Semiconductor – FAST PAGE MODE 268435456 - BIT ( 4194304 - WORD BY 64 - BIT ) DYNAMIC RAM

Preliminary Spec.
Specifications subject to
change without notice.
MITSUBISHI LSIs
MH4V644AWXJ -5, -6
FAST PAGE MODE 268435456 - BIT ( 4194304 - WORD BY 64 - BIT ) DYNAMIC RAM
DESCRIPTION
The MH4V644AWXJ is 4194304-word x 64-bit dynamic
ram module. This consist of four industry standard 4M x
16 dynamic RAMs in SOJ and one industry EEPROM in
TSSOP.
The mounting of SOJs and TSSOP on a card edge dual
in-line package provides any application where high
densities and large of quantities memory are required.
This is a socket-type memory module ,suitable for easy
interchange or addition of module.
FEATURES
Type name
/RAS /CAS Address /OE Cycle
access access access access
time time time time time
(max.ns) (max.ns) (max.ns) (max.ns) (min.ns)
MH4V644AWXJ-5 50 _{13 25 13} 90
MH4V644AWXJ-6 60 _{15 30 15} 110
Utilizes industry standard 4M x 16 RAMs in SOJ and industry
standard EEPROM in TSSOP
168-pin (84-pin dual dual in-line package)
Single +3.3V(±0.3V) supply operation
Low stand-by power dissipation
7.2mW(Max) . . . . . . . . . . . . . . . . . . . LVCMOS input level
Low operation power dissipation
MH4V644AWXJ -5 . . . . . . . . . . . . . . . . . . 2.02W(Max)
MH4V644AWXJ -6 . . . . . . . . . . . . . . . . . . 1.88W(Max)
All input are directly LVTTL compatible
All output are three-state and directly LVTTL compatible
Includes(0.22uF x 4) decoupling capacitors
4096 refresh cycle every 64ms
Fast-page mode,Read-modify-write,
/CAS before /RAS refresh,Hidden refresh capabilities
JEDEC standard pin configuration and SPD
Gold plating contact pads
Row Address A0 ~ A11
Column Address A0 ~ A9
APPLICATION
Main memory unit for computers , Microcomputer memory
PIN CONFIGURATION
85pin 1pin
94pin
95pin
10pin
11pin
BACK SIDE
124pin 40pin
125pin 41pin
FRONT SIDE
168pin 84pin
MIT-DS-0118-0.0
MITSUBISHI
ELECTRIC
( 1 / 20 )
11/Mar./1997