M6MGB166S4BWG Datasheet, PDF(1/30 Page) Mitsubishi Electric Semiconductor – 16,777,216-BIT (1,048,576 -WORD BY 16-BIT ) CMOS 3.3V-ONLY FLASH MEMORY

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M6MGB166S4BWG Datasheet, PDF (1/30 Pages) Mitsubishi Electric Semiconductor – 16,777,216-BIT (1,048,576 -WORD BY 16-BIT ) CMOS 3.3V-ONLY FLASH MEMORY

MITSUBISHI LSIs

M6MGB/T166S4BWG

16,777,216-BIT (1,048,576 -WORD BY 16-BIT ) CMOS

3.3V-ONLY FLASH MEMORY &

4,194,304-BIT (262,144-WORD BY 16-BIT) CMOS SRAM

Stacked-CSP (Chip Scale Package)

DESCRIPTION

The MITSUBISHI M6MGB/T166S4BWG is a Stacked Chip

Scale Package (S-CSP) that contents 16M-bits flash

memory and 4M-bits Static RAM in a 72-pin S-CSP.

16M-bits Flash memory is a 1,048,576 words, 3.3V-only,

and high performance non-volatile memory fabricated by

CMOS technology for the peripheral circuit and

DINOR(DIvided bit-line NOR) architecture for the memory

cell.

4M-bits SRAM is a 262,144words unsynchronous SRAM

fabricated by silicon-gate CMOS technology.

M6MGB/T166S4BWG is suitable for the application of the

mobile-communication-system to reduce both the mount

space and weight .

FEATURES

â¢ Access time

Flash Memory

90ns (Max.)

SRAM

85ns (Max.)

â¢ Supply voltage

Vcc=2.7 ~ 3.6V

â¢ Ambient temperature

W version

Ta=-20 ~ 85Â°C

â¢ Package : 72-pin S-CSP , 0.8mm ball pitch

APPLICATION

Mobile communication products

PIN CONFIGURATION (TOP VIEW)

HGF E DCB A

NC 1

NC 2

DU F-A18 S-LB# F-WP# GND F-WE# A16 DU 3

F-

A5 F-A17 S-UB# DU F-RP# RY/BY# A8 A11 4

A4 A7 S-OE# F-A19 DU DU A10 A15 5

A0 A6 DU DQ11 DU S-A17 A9 A14 6

F-CE# A3 DQ9 DU DQ12 DQ13 DQ15 A13 7

F-GND A2

DQ8

DQ10

S-

CE2

DQ6 S-WE# A12 8

F-OE# A1 DQ0 DQ2 S-VCC DQ4 DQ14 9 F-GND

S-

CE1#

DQ1 DQ3 F-VCC DQ5 DQ7

DU 10

NC 11

NC 12

8.0 mm

INDEX

F-VCC

:Vcc for Flash

S-VCC

:Vcc for SRAM

F-GND

:GND for Flash

GND

:Flash/SRAM common GND

A0-A16

:Flash/SRAM

common Address

F-A17-F-A19 :Address for Flash

S-A17

:Address for SRAM

DQ0-DQ15 :Flash/SRAM

common Data I/O

F-CE#

:Flash Chip Enable

S-CE1#

:SRAM Chip Enable

S-CE2

:SRAM Chip Enable

F-OE#

S-OE#

:Flash Output Enable

:SRAM Output Enable

F-WE#

:Flash Write Enable

S-WE#

:SRAM Write Enable

F-WP#

:Flash Write Protect

F-RP#

:Flash Reset Power Down

F-RY/BY# :Flash Ready /Busy

S-LB#

:SRAM Lower Byte

S-UB#

:SRAM Upper Byte

NC:Non Connection

DU:Don't Use (Note: Should be open)

Apr. 1999 , Rev.1.7

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