M5M54R08AJ-10 Datasheet, PDF (1/6 Pages) Mitsubishi Electric Semiconductor – 4194304-BIT (524288-WORD BY 8-BIT) CMOS STATIC RAM

1998.11.30 Ver..B
PRELIMINARY
Notice: This is not a final specification.
Some parametric limits are subject to change
MITSUBISHI LSIs
M5M54R08AJ-10,-12,-15
4194304-BIT (524288-WORD BY 8-BIT) CMOS STATIC RAM
DESCRIPTION
The M5M54R08AJ is a family of 524288-word by 8-bit
static RAMs, fabricated with the high performance CMOS
silicon gate process and designed for high speed
application.
These devices operate on a single 3.3V supply, and are
directly TTL compatible. They include a power down
feature as well.
FEATURES
•Fast access time
M5M54R08AJ-10 ... 10ns(max)
M5M54R08AJ-12 ... 12ns(max)
M5M54R08AJ-15 ... 15ns(max)
•Single +3.3V power supply
•Fully static operation : No clocks, No refresh
•Common data I/O
•Easy memory expansion by S
•Three-state outputs : OR-tie capability
•OE prevents data contention in the I/O bus
•Directly TTL compatible : All inputs and outputs
PIN CONFIGURATION (TOP VIEW)
A0 1
address
inputs
A1 ²
A2 3
A3 4
chip select
input
data inputs/
outputs
A4 5
S6
DQ1 7
DQ2 8
(3.3V) VCC 9
(0V) _GND 10
data
inputs/
DQ3 11
outputs DQ4 12
write control
input
W 13
A5 14
address
inputs
A6 15
A7 16
A8 17
A9 ¹⁸
36 NC
35 A18
34 A17
33 A16
address
inputs
32 A15 _{output enable}
31 OE input
30 DQ8
29 DQ7
data
inputs/
outputs
28 GND (0V)
27 VCC (3.3V)
26 DQ6
25 DQ5
data
inputs/
outputs
24 A14
23 A13
22 A12
21 A11
20 A10
address
inputs
19 NC
Outline 36P0K (SOJ)
APPLICATION
High-speed memory units
BLOCK DIAGRAM
A0 ₁
A1 2
A2 ₃
A3 4
address
inputs A4 5
A5 ₁₄
A6 15
A7 16
A8 17
A9 18
S6
W 13
OE 31
PACKAGE
M5M54R08AJ
: 36pin 400mil SOJ
MEMORY ARRAY
1024 ROWS
4096 COLUMNS
COLUMN I/O CIRCUITS
CCOOLLUUMMNNADDRESS
ADD^DR^EE^CS^OS^DERS
DECODERS
COLUMN INPUT BUFFERS
7 DQ1
8 DQ2
11 DQ3
12 DQ4
25 DQ5
26 DQ6
29 DQ7
30 DQ8
data
inputs/
outputs
9 _{VCC (3.3V)}
27
10
GND(0V)
28
20 21 22 23 24 32 33 34 35
A10 A11 A12 A13 A14 A15 A16 A16 A17
address inputs
MITSUBISHI
ELECTRIC
1